From a6c2065b2e6cb6c1b1e20e7f2dfc986a4bb872fa Mon Sep 17 00:00:00 2001 From: Yu Wang Date: Wed, 22 Aug 2018 14:25:39 +0000 Subject: [PATCH] hv: apicv: change the name of vapic to apicv Remove the vapic name and unify to apicv. Signed-off-by: Yu Wang Acked-by: Anthony Xu --- hypervisor/arch/x86/cpu.c | 24 ++++++++++++------------ hypervisor/arch/x86/guest/vlapic.c | 12 ++++++------ hypervisor/arch/x86/virq.c | 2 +- hypervisor/arch/x86/vmx.c | 12 ++++++------ hypervisor/include/arch/x86/cpu.h | 6 +++--- 5 files changed, 28 insertions(+), 28 deletions(-) diff --git a/hypervisor/arch/x86/cpu.c b/hypervisor/arch/x86/cpu.c index 317110dbb..5b640aba0 100644 --- a/hypervisor/arch/x86/cpu.c +++ b/hypervisor/arch/x86/cpu.c @@ -40,7 +40,7 @@ bool x2apic_enabled = false; #define VAPIC_FEATURE_VX2APIC_MODE (1U << 5) struct cpu_capability { - uint8_t vapic_features; + uint8_t apicv_features; uint8_t ept_features; }; static struct cpu_capability cpu_caps; @@ -785,7 +785,7 @@ static void ept_cap_detect(void) cpu_caps.ept_features = 1U; } -static void vapic_cap_detect(void) +static void apicv_cap_detect(void) { uint8_t features; uint64_t msr_val; @@ -794,14 +794,14 @@ static void vapic_cap_detect(void) msr_val = msr_read(MSR_IA32_VMX_PROCBASED_CTLS); if (!is_ctrl_setting_allowed(msr_val, VMX_PROCBASED_CTLS_TPR_SHADOW)) { - cpu_caps.vapic_features = 0U; + cpu_caps.apicv_features = 0U; return; } features |= VAPIC_FEATURE_TPR_SHADOW; msr_val = msr_read(MSR_IA32_VMX_PROCBASED_CTLS2); if (!is_ctrl_setting_allowed(msr_val, VMX_PROCBASED_CTLS2_VAPIC)) { - cpu_caps.vapic_features = features; + cpu_caps.apicv_features = features; return; } features |= VAPIC_FEATURE_VIRT_ACCESS; @@ -824,12 +824,12 @@ static void vapic_cap_detect(void) } } - cpu_caps.vapic_features = features; + cpu_caps.apicv_features = features; } static void cpu_cap_detect(void) { - vapic_cap_detect(); + apicv_cap_detect(); ept_cap_detect(); } @@ -838,19 +838,19 @@ bool is_ept_supported(void) return (cpu_caps.ept_features != 0U); } -bool is_vapic_supported(void) +bool is_apicv_supported(void) { - return ((cpu_caps.vapic_features & VAPIC_FEATURE_VIRT_ACCESS) != 0U); + return ((cpu_caps.apicv_features & VAPIC_FEATURE_VIRT_ACCESS) != 0U); } -bool is_vapic_intr_delivery_supported(void) +bool is_apicv_intr_delivery_supported(void) { - return ((cpu_caps.vapic_features & VAPIC_FEATURE_INTR_DELIVERY) != 0U); + return ((cpu_caps.apicv_features & VAPIC_FEATURE_INTR_DELIVERY) != 0U); } -bool is_vapic_virt_reg_supported(void) +bool is_apicv_virt_reg_supported(void) { - return ((cpu_caps.vapic_features & VAPIC_FEATURE_VIRT_REG) != 0U); + return ((cpu_caps.apicv_features & VAPIC_FEATURE_VIRT_REG) != 0U); } static void cpu_xsave_init(void) diff --git a/hypervisor/arch/x86/guest/vlapic.c b/hypervisor/arch/x86/guest/vlapic.c index f68cf3d12..81a2157eb 100644 --- a/hypervisor/arch/x86/guest/vlapic.c +++ b/hypervisor/arch/x86/guest/vlapic.c @@ -1198,7 +1198,7 @@ vlapic_icrlo_write_handler(struct acrn_vlapic *vlapic) target_vcpu->vm->vm_id); schedule_vcpu(target_vcpu); } else if (mode == APIC_DELMODE_SMI) { - pr_info("vmx vapic: SMI IPI do not support\n"); + pr_info("vlapic: SMI IPI do not support\n"); } else { pr_err("Unhandled icrlo write with mode %u\n", mode); } @@ -1924,7 +1924,7 @@ vlapic_rdmsr(struct vcpu *vcpu, uint32_t msr, uint64_t *rval) default: dev_dbg(ACRN_DBG_LAPIC, - "Invalid vmx vapic msr 0x%x access\n", msr); + "Invalid vlapic msr 0x%x access\n", msr); break; } @@ -1950,7 +1950,7 @@ vlapic_wrmsr(struct vcpu *vcpu, uint32_t msr, uint64_t wval) default: dev_dbg(ACRN_DBG_LAPIC, - "Invalid vmx vapic msr 0x%x access\n", msr); + "Invalid vlapic msr 0x%x access\n", msr); break; } @@ -2041,8 +2041,8 @@ int vlapic_create(struct vcpu *vcpu) ASSERT(vlapic != NULL, "vlapic allocate failed"); vlapic->vm = vcpu->vm; vlapic->vcpu = vcpu; - if (is_vapic_supported()) { - if (is_vapic_intr_delivery_supported()) { + if (is_apicv_supported()) { + if (is_apicv_intr_delivery_supported()) { vlapic->ops.apicv_set_intr_ready_fn = apicv_set_intr_ready; @@ -2095,7 +2095,7 @@ void vlapic_free(struct vcpu *vcpu) del_timer(&vlapic->vtimer.timer); - if (!is_vapic_supported()) { + if (!is_apicv_supported()) { unregister_mmio_emulation_handler(vcpu->vm, (uint64_t)DEFAULT_APIC_BASE, (uint64_t)DEFAULT_APIC_BASE + CPU_PAGE_SIZE); diff --git a/hypervisor/arch/x86/virq.c b/hypervisor/arch/x86/virq.c index 6dc9f2ffb..e11bfe3ca 100644 --- a/hypervisor/arch/x86/virq.c +++ b/hypervisor/arch/x86/virq.c @@ -115,7 +115,7 @@ static int vcpu_do_pending_event(struct vcpu *vcpu) uint32_t vector = 0U; int ret = 0; - if (is_vapic_intr_delivery_supported()) { + if (is_apicv_intr_delivery_supported()) { vlapic_apicv_inject_pir(vlapic); return 0; } diff --git a/hypervisor/arch/x86/vmx.c b/hypervisor/arch/x86/vmx.c index 3e5dc31c5..8b02ccd71 100644 --- a/hypervisor/arch/x86/vmx.c +++ b/hypervisor/arch/x86/vmx.c @@ -966,7 +966,7 @@ static void init_exec_ctrl(struct vcpu *vcpu) */ value32 &= ~VMX_PROCBASED_CTLS_INVLPG; - if (is_vapic_supported()) { + if (is_apicv_supported()) { value32 |= VMX_PROCBASED_CTLS_TPR_SHADOW; } else { /* Add CR8 VMExit for vlapic */ @@ -993,14 +993,14 @@ static void init_exec_ctrl(struct vcpu *vcpu) value32 &= ~VMX_PROCBASED_CTLS2_VPID; } - if (is_vapic_supported()) { + if (is_apicv_supported()) { value32 |= VMX_PROCBASED_CTLS2_VAPIC; - if (is_vapic_virt_reg_supported()) { + if (is_apicv_virt_reg_supported()) { value32 |= VMX_PROCBASED_CTLS2_VAPIC_REGS; } - if (is_vapic_intr_delivery_supported()) { + if (is_apicv_intr_delivery_supported()) { value32 |= VMX_PROCBASED_CTLS2_VIRQ; } else { @@ -1024,7 +1024,7 @@ static void init_exec_ctrl(struct vcpu *vcpu) exec_vmwrite32(VMX_PROC_VM_EXEC_CONTROLS2, value32); pr_dbg("VMX_PROC_VM_EXEC_CONTROLS2: 0x%x ", value32); - if (is_vapic_supported()) { + if (is_apicv_supported()) { /*APIC-v, config APIC-access address*/ value64 = vlapic_apicv_get_apic_access_addr(vcpu->vm); exec_vmwrite64(VMX_APIC_ACCESS_ADDR_FULL, @@ -1036,7 +1036,7 @@ static void init_exec_ctrl(struct vcpu *vcpu) exec_vmwrite64(VMX_VIRTUAL_APIC_PAGE_ADDR_FULL, value64); - if (is_vapic_intr_delivery_supported()) { + if (is_apicv_intr_delivery_supported()) { /* Disable all EOI VMEXIT by default and * clear RVI and SVI. */ diff --git a/hypervisor/include/arch/x86/cpu.h b/hypervisor/include/arch/x86/cpu.h index 891002572..0691fca57 100644 --- a/hypervisor/include/arch/x86/cpu.h +++ b/hypervisor/include/arch/x86/cpu.h @@ -323,9 +323,9 @@ extern struct cpuinfo_x86 boot_cpu_data; void cpu_do_idle(__unused uint16_t pcpu_id); void cpu_dead(uint16_t pcpu_id); void trampoline_start16(void); -bool is_vapic_supported(void); -bool is_vapic_intr_delivery_supported(void); -bool is_vapic_virt_reg_supported(void); +bool is_apicv_supported(void); +bool is_apicv_intr_delivery_supported(void); +bool is_apicv_virt_reg_supported(void); bool is_ept_supported(void); bool cpu_has_cap(uint32_t bit); void load_cpu_state_data(void);