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HV: remove board specific ve820

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Remove useless per board ve820.c as arch/x86/guest/ve820.c is common for
all boards now;

Tracked-On: #4458

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
This commit is contained in:
Victor Sun 2020-02-27 17:10:14 +08:00 committed by wenlingz
parent d7eac3fe6a
commit a7b61d2511
8 changed files with 0 additions and 374 deletions
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50
hypervisor/arch/x86/configs/apl-mrb/ve820.c
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@ -1,50 +0,0 @@
/*
* Copyright (C) 2018 Intel Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#include <e820.h>
#include <vm.h>
#define VE820_ENTRIES_APL_MRB 5U
static const struct e820_entry ve820_entry[VE820_ENTRIES_APL_MRB] = {
{ /* usable RAM under 1MB */
.baseaddr = 0x0UL,
.length = 0xF0000UL, /* 960KB */
.type = E820_TYPE_RAM
},
{ /* mptable */
.baseaddr = 0xF0000UL, /* 960KB */
.length = 0x10000UL, /* 16KB */
.type = E820_TYPE_RESERVED
},
{ /* lowmem */
.baseaddr = 0x100000UL, /* 1MB */
.length = 0x1FF00000UL, /* 511MB */
.type = E820_TYPE_RAM
},
{ /* between lowmem and PCI hole */
.baseaddr = 0x20000000UL, /* 512MB */
.length = 0xA0000000UL, /* 2560MB */
.type = E820_TYPE_RESERVED
},
{ /* between PCI hole and 4GB */
.baseaddr = 0xe0000000UL, /* 3.5GB */
.length = 0x20000000UL, /* 512MB */
.type = E820_TYPE_RESERVED
},
};
/**
* @pre vm != NULL
*/
void create_prelaunched_vm_e820(struct acrn_vm *vm)
{
vm->e820_entry_num = VE820_ENTRIES_APL_MRB;
vm->e820_entries = ve820_entry;
}

49
hypervisor/arch/x86/configs/apl-up2/ve820.c
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@ -1,49 +0,0 @@
/*
* Copyright (C) 2019 Intel Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#include <vm.h>
#define VE820_ENTRIES_APL_UP2 5U
static const struct e820_entry ve820_entry[VE820_ENTRIES_APL_UP2] = {
{ /* usable RAM under 1MB */
.baseaddr = 0x0UL,
.length = 0xF0000UL, /* 960KB */
.type = E820_TYPE_RAM
},
{ /* mptable */
.baseaddr = 0xF0000UL, /* 960KB */
.length = 0x10000UL, /* 16KB */
.type = E820_TYPE_RESERVED
},
{ /* lowmem */
.baseaddr = 0x100000UL, /* 1MB */
.length = 0x1FF00000UL, /* 511MB */
.type = E820_TYPE_RAM
},
{ /* between lowmem and PCI hole */
.baseaddr = 0x20000000UL, /* 512MB */
.length = 0xA0000000UL, /* 2560MB */
.type = E820_TYPE_RESERVED
},
{ /* between PCI hole and 4GB */
.baseaddr = 0xe0000000UL, /* 3.5GB */
.length = 0x20000000UL, /* 512MB */
.type = E820_TYPE_RESERVED
},
};
/**
* @pre vm != NULL
*/
void create_prelaunched_vm_e820(struct acrn_vm *vm)
{
vm->e820_entry_num = VE820_ENTRIES_APL_UP2;
vm->e820_entries = (struct e820_entry *)ve820_entry;
}

50
hypervisor/arch/x86/configs/dnv-cb2/ve820.c
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@ -1,50 +0,0 @@
/*
* Copyright (C) 2018 Intel Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#include <e820.h>
#include <vm.h>
#define VE820_ENTRIES_DNV_CB2 5U
static const struct e820_entry ve820_entry[VE820_ENTRIES_DNV_CB2] = {
{ /* usable RAM under 1MB */
.baseaddr = 0x0UL,
.length = 0xF0000UL, /* 960KB */
.type = E820_TYPE_RAM
},
{ /* mptable */
.baseaddr = 0xF0000UL, /* 960KB */
.length = 0x10000UL, /* 16KB */
.type = E820_TYPE_RESERVED
},
{ /* lowmem */
.baseaddr = 0x100000UL, /* 1MB */
.length = 0x7FF00000UL, /* 2047MB */
.type = E820_TYPE_RAM
},
{ /* between lowmem and PCI hole */
.baseaddr = 0x80000000UL, /* 2GB */
.length = 0x40000000UL, /* 1GB */
.type = E820_TYPE_RESERVED
},
{ /* between PCI hole and 4GB */
.baseaddr = 0xe0000000UL, /* 3.5GB */
.length = 0x20000000UL, /* 512MB */
.type = E820_TYPE_RESERVED
},
};
/**
* @pre vm != NULL
*/
void create_prelaunched_vm_e820(struct acrn_vm *vm)
{
vm->e820_entry_num = VE820_ENTRIES_DNV_CB2;
vm->e820_entries = ve820_entry;
}

16
hypervisor/arch/x86/configs/generic/ve820.c
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@ -1,16 +0,0 @@
/*
* Copyright (C) 2019 Intel Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#include <vm.h>
/**
* @pre vm != NULL
*/
void create_prelaunched_vm_e820(struct acrn_vm *vm)
{
vm->e820_entry_num = 0U;
vm->e820_entries = NULL;
}

16
hypervisor/arch/x86/configs/icl-rvp/ve820.c
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@ -1,16 +0,0 @@
/*
* Copyright (C) 2019 Intel Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#include <vm.h>
/**
* @pre vm != NULL
*/
void create_prelaunched_vm_e820(struct acrn_vm *vm)
{
vm->e820_entry_num = 0U;
vm->e820_entries = NULL;
}

49
hypervisor/arch/x86/configs/nuc6cayh/ve820.c
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@ -1,49 +0,0 @@
/*
* Copyright (C) 2019 Intel Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#include <vm.h>
#define VE820_ENTRIES_APL_NUC 5U
static const struct e820_entry ve820_entry[VE820_ENTRIES_APL_NUC] = {
{ /* usable RAM under 1MB */
.baseaddr = 0x0UL,
.length = 0xF0000UL, /* 960KB */
.type = E820_TYPE_RAM
},
{ /* mptable */
.baseaddr = 0xF0000UL, /* 960KB */
.length = 0x10000UL, /* 16KB */
.type = E820_TYPE_RESERVED
},
{ /* lowmem */
.baseaddr = 0x100000UL, /* 1MB */
.length = 0x1FF00000UL, /* 511MB */
.type = E820_TYPE_RAM
},
{ /* between lowmem and PCI hole */
.baseaddr = 0x20000000UL, /* 512MB */
.length = 0xA0000000UL, /* 2560MB */
.type = E820_TYPE_RESERVED
},
{ /* between PCI hole and 4GB */
.baseaddr = 0xe0000000UL, /* 3.5GB */
.length = 0x20000000UL, /* 512MB */
.type = E820_TYPE_RESERVED
},
};
/**
* @pre vm != NULL
*/
void create_prelaunched_vm_e820(struct acrn_vm *vm)
{
vm->e820_entry_num = VE820_ENTRIES_APL_NUC;
vm->e820_entries = (struct e820_entry *)ve820_entry;
}

49
hypervisor/arch/x86/configs/nuc7i7dnb/ve820.c
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@ -1,49 +0,0 @@
/*
* Copyright (C) 2019 Intel Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#include <e820.h>
#include <vm.h>
#define VE820_ENTRIES_KBL_NUC_i7 5U
static const struct e820_entry ve820_entry[VE820_ENTRIES_KBL_NUC_i7] = {
{ /* usable RAM under 1MB */
.baseaddr = 0x0UL,
.length = 0xF0000UL, /* 960KB */
.type = E820_TYPE_RAM
},
{ /* mptable */
.baseaddr = 0xF0000UL, /* 960KB */
.length = 0x10000UL, /* 16KB */
.type = E820_TYPE_RESERVED
},
{ /* lowmem */
.baseaddr = 0x100000UL, /* 1MB */
.length = 0x1FF00000UL, /* 511MB */
.type = E820_TYPE_RAM
},
{ /* between lowmem and PCI hole */
.baseaddr = 0x20000000UL, /* 512MB */
.length = 0xA0000000UL, /* 2560MB */
.type = E820_TYPE_RESERVED
},
{ /* between PCI hole and 4GB */
.baseaddr = 0xe0000000UL, /* 3.5GB */
.length = 0x20000000UL, /* 512MB */
.type = E820_TYPE_RESERVED
},
};
/**
* @pre vm != NULL
*/
void create_prelaunched_vm_e820(struct acrn_vm *vm)
{
vm->e820_entry_num = VE820_ENTRIES_KBL_NUC_i7;
vm->e820_entries = ve820_entry;
}

95
hypervisor/arch/x86/configs/whl-ipc-i5/ve820.c
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@ -1,95 +0,0 @@
/*
* Copyright (C) 2019 Intel Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#include <e820.h>
#include <vm.h>
#define VM0_VE820_ENTRIES_WHL_IPC_I5 5U
#define VM1_VE820_ENTRIES_WHL_IPC_I5 5U
static const struct e820_entry vm0_ve820_entry[VM0_VE820_ENTRIES_WHL_IPC_I5] = {
{ /* usable RAM under 1MB */
.baseaddr = 0x0UL,
.length = 0xF0000UL, /* 960KB */
.type = E820_TYPE_RAM
},
{ /* mptable */
.baseaddr = 0xF0000UL, /* 960KB */
.length = 0x10000UL, /* 64KB */
.type = E820_TYPE_RESERVED
},
{ /* lowmem */
.baseaddr = 0x100000UL, /* 1MB */
.length = 0x1ff00000UL, /* 511.0MB */
.type = E820_TYPE_RAM
},
{ /* between lowmem and PCI hole */
.baseaddr = 0x20000000UL, /* 512.0MB */
.length = 0xA0000000UL, /* 2560.0MB */
.type = E820_TYPE_RESERVED
},
{ /* between PCI hole and 4 GB */
.baseaddr = 0xe0000000UL, /* 3.5GB */
.length = 0x20000000UL, /* 512.0MB */
.type = E820_TYPE_RESERVED
},
};
static const struct e820_entry vm1_ve820_entry[VM1_VE820_ENTRIES_WHL_IPC_I5] = {
{ /* usable RAM under 1MB */
.baseaddr = 0x0UL,
.length = 0xF0000UL, /* 960KB */
.type = E820_TYPE_RAM
},
{ /* mptable */
.baseaddr = 0xF0000UL, /* 960KB */
.length = 0x10000UL, /* 64KB */
.type = E820_TYPE_RESERVED
},
{ /* lowmem */
.baseaddr = 0x100000UL, /* 1MB */
.length = 0x1ff00000UL, /* 511.0MB */
.type = E820_TYPE_RAM
},
{ /* between lowmem and PCI hole */
.baseaddr = 0x20000000UL, /* 512.0MB */
.length = 0xA0000000UL, /* 2560.0MB */
.type = E820_TYPE_RESERVED
},
{ /* between PCI hole and 4 GB */
.baseaddr = 0xe0000000UL, /* 3.5GB */
.length = 0x20000000UL, /* 512.0MB */
.type = E820_TYPE_RESERVED
},
};
/**
* @pre vm != NULL
*/
void create_prelaunched_vm_e820(struct acrn_vm *vm)
{
if (vm->vm_id == 0x0U)
{
vm->e820_entry_num = VM0_VE820_ENTRIES_WHL_IPC_I5;
vm->e820_entries = vm0_ve820_entry;
}
if (vm->vm_id == 0x1U)
{
vm->e820_entry_num = VM1_VE820_ENTRIES_WHL_IPC_I5;
vm->e820_entries = vm1_ve820_entry;
}
}