HV: remove vdev ops for partition mode

Remove vdev ops for partition mode, change related code to directly call the corresponding
functions instead

Remove struct pci_vdev_ops from vpci.h

Add @pre for pci_find_vdev_by_pbdf and pci_find_vdev_by_vbdf/partition_mode_vpci_init

Change the return value from int32_t to void to comply with misra c and
add ASSERT/panic in the functions (if necessary):
 vdev_hostbridge_init
 vdev_hostbridge_deinit
 vdev_pt_init
 vdev_pt_deinit

Still use pr_err in partition_mode_cfgread and partition_mode_cfgwrite to check if vdev cfgread/cfgwrite
access is aligned on 1/2/4 bytes, which is the only case that vdev cfgread/cfgwrite will return
nonzero, pr_err will be removed in subsequent patch titled "unify the sharing
mode and partition mode coding style for similar functions"

Remove @pre for local variables

Add ASSERT in partition_mode_pdev_init to check if pdev is NULL (user config
error)

Tracked-On: #2534
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
This commit is contained in:
dongshen
2019-03-06 14:38:42 -08:00
committed by Eddie Dong
parent b1cc18810e
commit a7f528cfd0
6 changed files with 73 additions and 99 deletions

View File

@@ -42,33 +42,31 @@ static inline uint32_t pci_bar_base(uint32_t bar)
return bar & PCIM_BAR_MEM_BASE;
}
static int32_t vdev_pt_init_validate(struct pci_vdev *vdev)
static int32_t validate(const struct pci_vdev *vdev)
{
uint32_t idx;
int32_t ret = 0;
for (idx = 0U; idx < PCI_BAR_COUNT; idx++) {
if ((vdev->bar[idx].base != 0x0UL)
|| ((vdev->bar[idx].size & 0xFFFUL) != 0x0UL)
|| ((vdev->bar[idx].type != PCIBAR_MEM32)
&& (vdev->bar[idx].type != PCIBAR_NONE))) {
return -EINVAL;
ret = -EINVAL;
break;
}
}
return 0;
return ret;
}
int32_t vdev_pt_init(struct pci_vdev *vdev)
void vdev_pt_init(struct pci_vdev *vdev)
{
int32_t ret;
struct acrn_vm *vm = vdev->vpci->vm;
uint16_t pci_command;
ret = vdev_pt_init_validate(vdev);
if (ret != 0) {
pr_err("Error, invalid bar defined");
return ret;
}
ASSERT(validate(vdev) == 0, "Error, invalid bar defined");
/* Create an iommu domain for target VM if not created */
if (vm->iommu == NULL) {
@@ -82,24 +80,26 @@ int32_t vdev_pt_init(struct pci_vdev *vdev)
ret = assign_iommu_device(vm->iommu, (uint8_t)vdev->pdev->bdf.bits.b,
(uint8_t)(vdev->pdev->bdf.value & 0xFFU));
if (ret != 0) {
panic("failed to assign iommu device!");
}
pci_command = (uint16_t)pci_pdev_read_cfg(vdev->pdev->bdf, PCIR_COMMAND, 2U);
/* Disable INTX */
pci_command |= 0x400U;
pci_pdev_write_cfg(vdev->pdev->bdf, PCIR_COMMAND, 2U, pci_command);
return ret;
}
int32_t vdev_pt_deinit(const struct pci_vdev *vdev)
void vdev_pt_deinit(const struct pci_vdev *vdev)
{
int32_t ret;
struct acrn_vm *vm = vdev->vpci->vm;
ret = unassign_iommu_device(vm->iommu, (uint8_t)vdev->pdev->bdf.bits.b,
(uint8_t)(vdev->pdev->bdf.value & 0xFFU));
return ret;
if (ret != 0) {
panic("failed to unassign iommu device!");
}
}
int32_t vdev_pt_cfgread(const struct pci_vdev *vdev, uint32_t offset,
@@ -200,10 +200,3 @@ int32_t vdev_pt_cfgwrite(struct pci_vdev *vdev, uint32_t offset,
return 0;
}
const struct pci_vdev_ops pci_ops_vdev_pt = {
.init = vdev_pt_init,
.deinit = vdev_pt_deinit,
.cfgwrite = vdev_pt_cfgwrite,
.cfgread = vdev_pt_cfgread,
};