From a8c2ba03fcf0666a5550705c98ed1bd040b9d34c Mon Sep 17 00:00:00 2001 From: Victor Sun Date: Thu, 12 Mar 2020 10:47:40 +0800 Subject: [PATCH] HV: add pci_devices.h for nuc6cayh and apl-up2 As pci_devices.h is included by , need to prepare pci_devices.h for nuc6cayh and apl-up2 board. Also the #error info in generic/pci_devices.h should be removed, otherwise the build will be failed in sdc/sdc2/industry scenarios. Tracked-On: #4458 Signed-off-by: Victor Sun --- .../arch/x86/configs/apl-up2/pci_devices.h | 28 +++++++++++++++++++ .../arch/x86/configs/generic/pci_devices.h | 2 +- .../arch/x86/configs/nuc6cayh/pci_devices.h | 27 ++++++++++++++++++ 3 files changed, 56 insertions(+), 1 deletion(-) create mode 100644 hypervisor/arch/x86/configs/apl-up2/pci_devices.h create mode 100644 hypervisor/arch/x86/configs/nuc6cayh/pci_devices.h diff --git a/hypervisor/arch/x86/configs/apl-up2/pci_devices.h b/hypervisor/arch/x86/configs/apl-up2/pci_devices.h new file mode 100644 index 000000000..9cd982c42 --- /dev/null +++ b/hypervisor/arch/x86/configs/apl-up2/pci_devices.h @@ -0,0 +1,28 @@ +/* + * Copyright (C) 2020 Intel Corporation. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef PCI_DEVICES_H_ +#define PCI_DEVICES_H_ + +#define PTDEV_HI_MMIO_SIZE 0UL + +#define SATA_CONTROLLER_0 .pbdf.bits = {.b = 0x00U, .d = 0x12U, .f = 0x00U}, \ + .vbar_base[0] = 0x91514000UL, \ + .vbar_base[1] = 0x91539000UL, \ + .vbar_base[5] = 0x91538000UL + +#define USB_CONTROLLER_0 .pbdf.bits = {.b = 0x00U, .d = 0x15U, .f = 0x00U}, \ + .vbar_base[0] = 0x91500000UL + +#define ETHERNET_CONTROLLER_0 .pbdf.bits = {.b = 0x02U, .d = 0x00U, .f = 0x00U}, \ + .vbar_base[2] = 0x91404000UL, \ + .vbar_base[4] = 0x91400000UL + +#define ETHERNET_CONTROLLER_1 .pbdf.bits = {.b = 0x03U, .d = 0x00U, .f = 0x00U}, \ + .vbar_base[2] = 0x91304000UL, \ + .vbar_base[4] = 0x91300000UL + +#endif /* PCI_DEVICES_H_ */ diff --git a/hypervisor/arch/x86/configs/generic/pci_devices.h b/hypervisor/arch/x86/configs/generic/pci_devices.h index 8e2af5f90..74ba04f0a 100644 --- a/hypervisor/arch/x86/configs/generic/pci_devices.h +++ b/hypervisor/arch/x86/configs/generic/pci_devices.h @@ -7,6 +7,6 @@ #ifndef PCI_DEVICES_H_ #define PCI_DEVICES_H_ -#error "This is a dummy pci_devices.h, please generate PCI BDF info for your board." +#define PTDEV_HI_MMIO_SIZE 0UL #endif /* PCI_DEVICES_H_ */ diff --git a/hypervisor/arch/x86/configs/nuc6cayh/pci_devices.h b/hypervisor/arch/x86/configs/nuc6cayh/pci_devices.h new file mode 100644 index 000000000..76ec20f49 --- /dev/null +++ b/hypervisor/arch/x86/configs/nuc6cayh/pci_devices.h @@ -0,0 +1,27 @@ +/* + * Copyright (C) 2020 Intel Corporation. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef PCI_DEVICES_H_ +#define PCI_DEVICES_H_ + +#define PTDEV_HI_MMIO_SIZE 0UL + +#define SATA_CONTROLLER_0 .pbdf.bits = {.b = 0x00U, .d = 0x12U, .f = 0x00U}, \ + .vbar_base[0] = 0x91414000UL, \ + .vbar_base[1] = 0x91424000UL, \ + .vbar_base[5] = 0x91423000UL + +#define USB_CONTROLLER_0 .pbdf.bits = {.b = 0x00U, .d = 0x15U, .f = 0x00U}, \ + .vbar_base[0] = 0x91400000UL + +#define NETWORK_CONTROLLER_0 .pbdf.bits = {.b = 0x02U, .d = 0x00U, .f = 0x00U}, \ + .vbar_base[0] = 0x91200000UL + +#define ETHERNET_CONTROLLER_0 .pbdf.bits = {.b = 0x03U, .d = 0x00U, .f = 0x00U}, \ + .vbar_base[2] = 0x91104000UL, \ + .vbar_base[4] = 0x91100000UL + +#endif /* PCI_DEVICES_H_ */