diff --git a/hypervisor/Makefile b/hypervisor/Makefile index 397860057..d3e14f760 100644 --- a/hypervisor/Makefile +++ b/hypervisor/Makefile @@ -140,6 +140,7 @@ C_SRCS += arch/x86/cpu_state_tbl.c C_SRCS += arch/x86/mtrr.c C_SRCS += arch/x86/pm.c S_SRCS += arch/x86/wakeup.S +C_SRCS += arch/x86/static_checks.c C_SRCS += arch/x86/guest/vcpu.c C_SRCS += arch/x86/guest/vm.c C_SRCS += arch/x86/guest/vlapic.c @@ -165,6 +166,7 @@ C_SRCS += common/schedule.c C_SRCS += common/vm_load.c C_SRCS += common/io_request.c C_SRCS += common/ptdev.c +C_SRCS += common/static_checks.c ifdef STACK_PROTECTOR C_SRCS += common/stack_protector.c diff --git a/hypervisor/arch/x86/cpu.c b/hypervisor/arch/x86/cpu.c index 8d62235dc..4d7bf082f 100644 --- a/hypervisor/arch/x86/cpu.c +++ b/hypervisor/arch/x86/cpu.c @@ -386,78 +386,6 @@ void bsp_boot_init(void) (void)memset(&_ld_bss_start, 0U, (size_t)(&_ld_bss_end - &_ld_bss_start)); - /* Build time sanity checks to make sure hard-coded offset - * is matching the actual offset! - */ - ASSERT((sizeof(struct trusty_startup_param) - + sizeof(struct trusty_key_info)) < 0x1000U, - "trusty_startup_param + key_info > 1Page size(4KB)!"); - - ASSERT(NR_WORLD == 2, "Only 2 Worlds supported!"); - ASSERT(offsetof(struct cpu_gp_regs, rax) == - CPU_CONTEXT_OFFSET_RAX, - "cpu_gp_regs rax offset not match"); - ASSERT(offsetof(struct cpu_gp_regs, rbx) == - CPU_CONTEXT_OFFSET_RBX, - "cpu_gp_regs rbx offset not match"); - ASSERT(offsetof(struct cpu_gp_regs, rcx) == - CPU_CONTEXT_OFFSET_RCX, - "cpu_gp_regs rcx offset not match"); - ASSERT(offsetof(struct cpu_gp_regs, rdx) == - CPU_CONTEXT_OFFSET_RDX, - "cpu_gp_regs rdx offset not match"); - ASSERT(offsetof(struct cpu_gp_regs, rbp) == - CPU_CONTEXT_OFFSET_RBP, - "cpu_gp_regs rbp offset not match"); - ASSERT(offsetof(struct cpu_gp_regs, rsi) == - CPU_CONTEXT_OFFSET_RSI, - "cpu_gp_regs rsi offset not match"); - ASSERT(offsetof(struct cpu_gp_regs, rdi) == - CPU_CONTEXT_OFFSET_RDI, - "cpu_gp_regs rdi offset not match"); - ASSERT(offsetof(struct cpu_gp_regs, r8) == - CPU_CONTEXT_OFFSET_R8, - "cpu_gp_regs r8 offset not match"); - ASSERT(offsetof(struct cpu_gp_regs, r9) == - CPU_CONTEXT_OFFSET_R9, - "cpu_gp_regs r9 offset not match"); - ASSERT(offsetof(struct cpu_gp_regs, r10) == - CPU_CONTEXT_OFFSET_R10, - "cpu_gp_regs r10 offset not match"); - ASSERT(offsetof(struct cpu_gp_regs, r11) == - CPU_CONTEXT_OFFSET_R11, - "cpu_gp_regs r11 offset not match"); - ASSERT(offsetof(struct cpu_gp_regs, r12) == - CPU_CONTEXT_OFFSET_R12, - "cpu_gp_regs r12 offset not match"); - ASSERT(offsetof(struct cpu_gp_regs, r13) == - CPU_CONTEXT_OFFSET_R13, - "cpu_gp_regs r13 offset not match"); - ASSERT(offsetof(struct cpu_gp_regs, r14) == - CPU_CONTEXT_OFFSET_R14, - "cpu_gp_regs r14 offset not match"); - ASSERT(offsetof(struct cpu_gp_regs, r15) == - CPU_CONTEXT_OFFSET_R15, - "cpu_gp_regs r15 offset not match"); - ASSERT(offsetof(struct run_context, cr2) == - CPU_CONTEXT_OFFSET_CR2, - "run_context cr2 offset not match"); - ASSERT(offsetof(struct run_context, ia32_spec_ctrl) == - CPU_CONTEXT_OFFSET_IA32_SPEC_CTRL, - "run_context ia32_spec_ctrl offset not match"); - ASSERT(offsetof(struct run_context, rflags) == - CPU_CONTEXT_OFFSET_RFLAGS, - "run_context rflags offset not match"); - ASSERT(offsetof(struct ext_context, cr3) == - CPU_CONTEXT_OFFSET_CR3 - CPU_CONTEXT_OFFSET_EXTCTX_START, - "ext_context cr3 offset not match"); - ASSERT(offsetof(struct ext_context, idtr) == - CPU_CONTEXT_OFFSET_IDTR - CPU_CONTEXT_OFFSET_EXTCTX_START, - "ext_context idtr offset not match"); - ASSERT(offsetof(struct ext_context, ldtr) == - CPU_CONTEXT_OFFSET_LDTR - CPU_CONTEXT_OFFSET_EXTCTX_START, - "ext_context ldtr offset not match"); - bitmap_set_nolock(BOOT_CPU_ID, &pcpu_active_bitmap); misc_en = msr_read(MSR_IA32_MISC_ENABLE); diff --git a/hypervisor/arch/x86/static_checks.c b/hypervisor/arch/x86/static_checks.c new file mode 100644 index 000000000..95e79be4a --- /dev/null +++ b/hypervisor/arch/x86/static_checks.c @@ -0,0 +1,61 @@ +/* + * Copyright (C) 2018 Intel Corporation. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ +#include +#include +#include + +#define CAT_(A,B) A ## B +#define CTASSERT(expr) \ +typedef int CAT_(CTA_DummyType,__LINE__)[(expr) ? 1 : -1] + +/* Build time sanity checks to make sure hard-coded offset +* is matching the actual offset! +*/ +CTASSERT(BOOT_CTX_CR0_OFFSET == offsetof(struct boot_ctx, cr0)); +CTASSERT(BOOT_CTX_CR3_OFFSET == offsetof(struct boot_ctx, cr3)); +CTASSERT(BOOT_CTX_CR4_OFFSET == offsetof(struct boot_ctx, cr4)); +CTASSERT(BOOT_CTX_IDT_OFFSET == offsetof(struct boot_ctx, idt)); +CTASSERT(BOOT_CTX_GDT_OFFSET == offsetof(struct boot_ctx, gdt)); +CTASSERT(BOOT_CTX_LDT_SEL_OFFSET == offsetof(struct boot_ctx, ldt_sel)); +CTASSERT(BOOT_CTX_TR_SEL_OFFSET == offsetof(struct boot_ctx, tr_sel)); +CTASSERT(BOOT_CTX_CS_SEL_OFFSET == offsetof(struct boot_ctx, cs_sel)); +CTASSERT(BOOT_CTX_SS_SEL_OFFSET == offsetof(struct boot_ctx, ss_sel)); +CTASSERT(BOOT_CTX_DS_SEL_OFFSET == offsetof(struct boot_ctx, ds_sel)); +CTASSERT(BOOT_CTX_ES_SEL_OFFSET == offsetof(struct boot_ctx, es_sel)); +CTASSERT(BOOT_CTX_FS_SEL_OFFSET == offsetof(struct boot_ctx, fs_sel)); +CTASSERT(BOOT_CTX_GS_SEL_OFFSET == offsetof(struct boot_ctx, gs_sel)); +CTASSERT(BOOT_CTX_CS_AR_OFFSET == offsetof(struct boot_ctx, cs_ar)); +CTASSERT(BOOT_CTX_EFER_LOW_OFFSET == offsetof(struct boot_ctx, ia32_efer)); +CTASSERT(BOOT_CTX_EFER_HIGH_OFFSET == offsetof(struct boot_ctx, ia32_efer) + 4); + +CTASSERT(CPU_CONTEXT_OFFSET_RAX == offsetof(struct cpu_gp_regs, rax)); +CTASSERT(CPU_CONTEXT_OFFSET_RBX == offsetof(struct cpu_gp_regs, rbx)); +CTASSERT(CPU_CONTEXT_OFFSET_RCX == offsetof(struct cpu_gp_regs, rcx)); +CTASSERT(CPU_CONTEXT_OFFSET_RDX == offsetof(struct cpu_gp_regs, rdx)); +CTASSERT(CPU_CONTEXT_OFFSET_RBP == offsetof(struct cpu_gp_regs, rbp)); +CTASSERT(CPU_CONTEXT_OFFSET_RSI == offsetof(struct cpu_gp_regs, rsi)); +CTASSERT(CPU_CONTEXT_OFFSET_RDI == offsetof(struct cpu_gp_regs, rdi)); +CTASSERT(CPU_CONTEXT_OFFSET_R8 == offsetof(struct cpu_gp_regs, r8)); +CTASSERT(CPU_CONTEXT_OFFSET_R9 == offsetof(struct cpu_gp_regs, r9)); +CTASSERT(CPU_CONTEXT_OFFSET_R10 == offsetof(struct cpu_gp_regs, r10)); +CTASSERT(CPU_CONTEXT_OFFSET_R11 == offsetof(struct cpu_gp_regs, r11)); +CTASSERT(CPU_CONTEXT_OFFSET_R12 == offsetof(struct cpu_gp_regs, r12)); +CTASSERT(CPU_CONTEXT_OFFSET_R13 == offsetof(struct cpu_gp_regs, r13)); +CTASSERT(CPU_CONTEXT_OFFSET_R14 == offsetof(struct cpu_gp_regs, r14)); +CTASSERT(CPU_CONTEXT_OFFSET_R15 == offsetof(struct cpu_gp_regs, r15)); +CTASSERT(CPU_CONTEXT_OFFSET_CR2 == offsetof(struct run_context, cr2)); +CTASSERT(CPU_CONTEXT_OFFSET_IA32_SPEC_CTRL + == offsetof(struct run_context, ia32_spec_ctrl)); +CTASSERT(CPU_CONTEXT_OFFSET_RFLAGS == offsetof(struct run_context, rflags)); +CTASSERT(CPU_CONTEXT_OFFSET_CR3 - CPU_CONTEXT_OFFSET_EXTCTX_START + == offsetof(struct ext_context, cr3)); +CTASSERT(CPU_CONTEXT_OFFSET_IDTR - CPU_CONTEXT_OFFSET_EXTCTX_START + == offsetof(struct ext_context, idtr)); +CTASSERT(CPU_CONTEXT_OFFSET_LDTR - CPU_CONTEXT_OFFSET_EXTCTX_START + == offsetof(struct ext_context, ldtr)); +CTASSERT((sizeof(struct trusty_startup_param) + + sizeof(struct trusty_key_info)) < 0x1000U); +CTASSERT(NR_WORLD == 2); diff --git a/hypervisor/common/io_request.c b/hypervisor/common/io_request.c index fc02e52a4..41a728bb6 100644 --- a/hypervisor/common/io_request.c +++ b/hypervisor/common/io_request.c @@ -62,10 +62,6 @@ acrn_insert_request_wait(struct vcpu *vcpu, struct io_request *io_req) struct vhm_request *vhm_req; uint16_t cur; - ASSERT(sizeof(struct vhm_request) == (4096U/VHM_REQUEST_MAX), - "vhm_request page broken!"); - - if ((vcpu == NULL) || (io_req == NULL) || (vcpu->vm->sw.io_shared_page == NULL)) { return -EINVAL; diff --git a/hypervisor/common/static_checks.c b/hypervisor/common/static_checks.c new file mode 100644 index 000000000..7c3692ffd --- /dev/null +++ b/hypervisor/common/static_checks.c @@ -0,0 +1,12 @@ +/* + * Copyright (C) 2018 Intel Corporation. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ +#include + +#define CAT_(A,B) A ## B +#define CTASSERT(expr) \ +typedef int CAT_(CTA_DummyType,__LINE__)[(expr) ? 1 : -1] + +CTASSERT(sizeof(struct vhm_request) == (4096U/VHM_REQUEST_MAX));