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hv: vtd: init DMAR/IR table address when register

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Initialize root_table_addr/ir_table_addr of dmar uint when register the dmar uint.
So no need to check if they are initialzed or not later.

Tracked-On: #4831
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
This commit is contained in:
Binbin Wu 2020-04-30 07:48:04 +00:00 committed by wenlingz
parent b7f667a3ba
commit a94c3ef763
1 changed files with 6 additions and 24 deletions
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30
hypervisor/arch/x86/vtd.c
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@ -450,6 +450,8 @@ static int32_t dmar_register_hrhd(struct dmar_drhd_rt *dmar_unit)
dmar_unit->cap_num_fault_regs = iommu_cap_num_fault_regs(dmar_unit->cap); dmar_unit->cap_num_fault_regs = iommu_cap_num_fault_regs(dmar_unit->cap);
dmar_unit->cap_fault_reg_offset = iommu_cap_fault_reg_offset(dmar_unit->cap); dmar_unit->cap_fault_reg_offset = iommu_cap_fault_reg_offset(dmar_unit->cap);
dmar_unit->ecap_iotlb_offset = iommu_ecap_iro(dmar_unit->ecap) * 16U; dmar_unit->ecap_iotlb_offset = iommu_ecap_iro(dmar_unit->ecap) * 16U;
dmar_unit->root_table_addr = hva2hpa(get_root_table(dmar_unit->index));
dmar_unit->ir_table_addr = hva2hpa(get_ir_table(dmar_unit->index));
#if DBG_IOMMU #if DBG_IOMMU
pr_info("version:0x%x, cap:0x%lx, ecap:0x%lx", pr_info("version:0x%x, cap:0x%lx, ecap:0x%lx",
@ -675,6 +677,7 @@ static void dmar_invalid_iotlb_global(struct dmar_drhd_rt *dmar_unit)
dmar_invalid_iotlb(dmar_unit, 0U, 0UL, 0U, false, DMAR_IIRG_GLOBAL); dmar_invalid_iotlb(dmar_unit, 0U, 0UL, 0U, false, DMAR_IIRG_GLOBAL);
} }
/* @pre dmar_unit->ir_table_addr != NULL */
static void dmar_set_intr_remap_table(struct dmar_drhd_rt *dmar_unit) static void dmar_set_intr_remap_table(struct dmar_drhd_rt *dmar_unit)
{ {
uint64_t address; uint64_t address;
@ -683,15 +686,9 @@ static void dmar_set_intr_remap_table(struct dmar_drhd_rt *dmar_unit)
spinlock_obtain(&(dmar_unit->lock)); spinlock_obtain(&(dmar_unit->lock));
if (dmar_unit->ir_table_addr == 0UL) {
dmar_unit->ir_table_addr = hva2hpa(get_ir_table(dmar_unit->index));
}
address = dmar_unit->ir_table_addr | DMAR_IR_ENABLE_EIM;
/* Set number of bits needed to represent the entries minus 1 */ /* Set number of bits needed to represent the entries minus 1 */
size = (uint8_t) fls32(CONFIG_MAX_IR_ENTRIES) - 1U; size = (uint8_t) fls32(CONFIG_MAX_IR_ENTRIES) - 1U;
address = address | size; address = dmar_unit->ir_table_addr | DMAR_IR_ENABLE_EIM | size;
iommu_write64(dmar_unit, DMAR_IRTA_REG, address); iommu_write64(dmar_unit, DMAR_IRTA_REG, address);
@ -730,28 +727,13 @@ static void dmar_invalid_iec_global(struct dmar_drhd_rt *dmar_unit)
dmar_invalid_iec(dmar_unit, 0U, 0U, true); dmar_invalid_iec(dmar_unit, 0U, 0U, true);
} }
/* @pre dmar_unit->root_table_addr != NULL */
static void dmar_set_root_table(struct dmar_drhd_rt *dmar_unit) static void dmar_set_root_table(struct dmar_drhd_rt *dmar_unit)
{ {
uint64_t address;
uint32_t status; uint32_t status;
spinlock_obtain(&(dmar_unit->lock)); spinlock_obtain(&(dmar_unit->lock));
iommu_write64(dmar_unit, DMAR_RTADDR_REG, dmar_unit->root_table_addr);
/*
* dmar_set_root_table is called from init_iommu and
* resume_iommu. So NULL check on this pointer is needed
* so that we do not change the root table pointer in the
* resume flow.
*/
if (dmar_unit->root_table_addr == 0UL) {
dmar_unit->root_table_addr = hva2hpa(get_root_table(dmar_unit->index));
}
/* Currently don't support extended root table */
address = dmar_unit->root_table_addr;
iommu_write64(dmar_unit, DMAR_RTADDR_REG, address);
iommu_write32(dmar_unit, DMAR_GCMD_REG, dmar_unit->gcmd | DMA_GCMD_SRTP); iommu_write32(dmar_unit, DMAR_GCMD_REG, dmar_unit->gcmd | DMA_GCMD_SRTP);