mirror of
https://github.com/projectacrn/acrn-hypervisor.git
synced 2025-06-22 21:47:22 +00:00
hv: change several APIs to void type
Change these 6 APIs to void type: init_default_irqs interrupt_init early_init_lapic init_lapic init_iommu destroy_iommu_domain It has checked the argument of destroy_iommu_domain in shutdown_vm, then no need to check it again inside destroy_iommu_domain. Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com> Reviewed-by: Junjie Mao <junjie.mao@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
This commit is contained in:
parent
8017ebdf82
commit
aa2b2d80d4
@ -544,10 +544,7 @@ static void bsp_boot_post(void)
|
|||||||
|
|
||||||
ASSERT(get_cpu_id() == BOOT_CPU_ID, "");
|
ASSERT(get_cpu_id() == BOOT_CPU_ID, "");
|
||||||
|
|
||||||
if (init_iommu() != 0) {
|
init_iommu();
|
||||||
pr_fatal("%s, init iommu failed\n", __func__);
|
|
||||||
return;
|
|
||||||
}
|
|
||||||
|
|
||||||
console_setup_timer();
|
console_setup_timer();
|
||||||
|
|
||||||
|
@ -365,10 +365,10 @@ uint32_t dev_to_vector(struct dev_handler_node *node)
|
|||||||
return node->desc->vector;
|
return node->desc->vector;
|
||||||
}
|
}
|
||||||
|
|
||||||
int init_default_irqs(uint16_t cpu_id)
|
void init_default_irqs(uint16_t cpu_id)
|
||||||
{
|
{
|
||||||
if (cpu_id != BOOT_CPU_ID) {
|
if (cpu_id != BOOT_CPU_ID) {
|
||||||
return 0;
|
return;
|
||||||
}
|
}
|
||||||
|
|
||||||
init_irq_desc();
|
init_irq_desc();
|
||||||
@ -377,8 +377,6 @@ int init_default_irqs(uint16_t cpu_id)
|
|||||||
disable_pic_irq();
|
disable_pic_irq();
|
||||||
setup_ioapic_irq();
|
setup_ioapic_irq();
|
||||||
init_softirq();
|
init_softirq();
|
||||||
|
|
||||||
return 0;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
void dispatch_exception(struct intr_excp_ctx *ctx)
|
void dispatch_exception(struct intr_excp_ctx *ctx)
|
||||||
@ -731,28 +729,14 @@ void get_cpu_interrupt_info(char *str, int str_max)
|
|||||||
}
|
}
|
||||||
#endif /* HV_DEBUG */
|
#endif /* HV_DEBUG */
|
||||||
|
|
||||||
int interrupt_init(uint16_t pcpu_id)
|
void interrupt_init(uint16_t pcpu_id)
|
||||||
{
|
{
|
||||||
struct host_idt_descriptor *idtd = &HOST_IDTR;
|
struct host_idt_descriptor *idtd = &HOST_IDTR;
|
||||||
int status;
|
|
||||||
|
|
||||||
set_idt(idtd);
|
set_idt(idtd);
|
||||||
|
init_lapic(pcpu_id);
|
||||||
status = init_lapic(pcpu_id);
|
init_default_irqs(pcpu_id);
|
||||||
ASSERT(status == 0, "lapic init failed");
|
|
||||||
if (status != 0) {
|
|
||||||
return -ENODEV;
|
|
||||||
}
|
|
||||||
|
|
||||||
status = init_default_irqs(pcpu_id);
|
|
||||||
ASSERT(status == 0, "irqs init failed");
|
|
||||||
if (status != 0) {
|
|
||||||
return -ENODEV;
|
|
||||||
}
|
|
||||||
|
|
||||||
#ifndef CONFIG_EFI_STUB
|
#ifndef CONFIG_EFI_STUB
|
||||||
CPU_IRQ_ENABLE();
|
CPU_IRQ_ENABLE();
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
return status;
|
|
||||||
}
|
}
|
||||||
|
@ -180,7 +180,7 @@ static void map_lapic(void)
|
|||||||
lapic_info.xapic.vaddr = HPA2HVA(lapic_info.xapic.paddr);
|
lapic_info.xapic.vaddr = HPA2HVA(lapic_info.xapic.paddr);
|
||||||
}
|
}
|
||||||
|
|
||||||
int early_init_lapic(void)
|
void early_init_lapic(void)
|
||||||
{
|
{
|
||||||
/* Get local APIC base address */
|
/* Get local APIC base address */
|
||||||
lapic_base_msr.value = msr_read(MSR_IA32_APIC_BASE);
|
lapic_base_msr.value = msr_read(MSR_IA32_APIC_BASE);
|
||||||
@ -207,11 +207,9 @@ int early_init_lapic(void)
|
|||||||
ASSERT(lapic_base_msr.fields.x2APIC_enable == 0U,
|
ASSERT(lapic_base_msr.fields.x2APIC_enable == 0U,
|
||||||
"Disable X2APIC in BIOS");
|
"Disable X2APIC in BIOS");
|
||||||
}
|
}
|
||||||
|
|
||||||
return 0;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
int init_lapic(uint16_t pcpu_id)
|
void init_lapic(uint16_t pcpu_id)
|
||||||
{
|
{
|
||||||
/* Set the Logical Destination Register */
|
/* Set the Logical Destination Register */
|
||||||
write_lapic_reg32(LAPIC_LOGICAL_DESTINATION_REGISTER,
|
write_lapic_reg32(LAPIC_LOGICAL_DESTINATION_REGISTER,
|
||||||
@ -236,8 +234,6 @@ int init_lapic(uint16_t pcpu_id)
|
|||||||
|
|
||||||
/* Ensure there are no ISR bits set. */
|
/* Ensure there are no ISR bits set. */
|
||||||
clear_lapic_isr();
|
clear_lapic_isr();
|
||||||
|
|
||||||
return 0;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
void save_lapic(struct lapic_regs *regs)
|
void save_lapic(struct lapic_regs *regs)
|
||||||
|
@ -169,25 +169,18 @@ static struct list_head iommu_domains;
|
|||||||
static void dmar_register_hrhd(struct dmar_drhd_rt *drhd_rt);
|
static void dmar_register_hrhd(struct dmar_drhd_rt *drhd_rt);
|
||||||
static struct dmar_drhd_rt *device_to_dmaru(uint16_t segment, uint8_t bus,
|
static struct dmar_drhd_rt *device_to_dmaru(uint16_t segment, uint8_t bus,
|
||||||
uint8_t devfun);
|
uint8_t devfun);
|
||||||
static int register_hrhd_units(void)
|
static void register_hrhd_units(void)
|
||||||
{
|
{
|
||||||
struct dmar_info *info = get_dmar_info();
|
struct dmar_info *info = get_dmar_info();
|
||||||
struct dmar_drhd_rt *drhd_rt;
|
struct dmar_drhd_rt *drhd_rt;
|
||||||
uint32_t i;
|
uint32_t i;
|
||||||
|
|
||||||
if (info == NULL) {
|
|
||||||
pr_warn("vtd: no dmar units found");
|
|
||||||
return -1;
|
|
||||||
}
|
|
||||||
|
|
||||||
for (i = 0U; i < info->drhd_count; i++) {
|
for (i = 0U; i < info->drhd_count; i++) {
|
||||||
drhd_rt = calloc(1, sizeof(struct dmar_drhd_rt));
|
drhd_rt = calloc(1, sizeof(struct dmar_drhd_rt));
|
||||||
ASSERT(drhd_rt != NULL, "");
|
ASSERT(drhd_rt != NULL, "");
|
||||||
drhd_rt->drhd = &info->drhd_units[i];
|
drhd_rt->drhd = &info->drhd_units[i];
|
||||||
dmar_register_hrhd(drhd_rt);
|
dmar_register_hrhd(drhd_rt);
|
||||||
}
|
}
|
||||||
|
|
||||||
return 0;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
static uint32_t iommu_read32(struct dmar_drhd_rt *dmar_uint, uint32_t offset)
|
static uint32_t iommu_read32(struct dmar_drhd_rt *dmar_uint, uint32_t offset)
|
||||||
@ -910,12 +903,11 @@ struct iommu_domain *create_iommu_domain(uint16_t vm_id, uint64_t translation_ta
|
|||||||
return domain;
|
return domain;
|
||||||
}
|
}
|
||||||
|
|
||||||
int destroy_iommu_domain(struct iommu_domain *domain)
|
/**
|
||||||
|
* @pre domain != NULL
|
||||||
|
*/
|
||||||
|
void destroy_iommu_domain(struct iommu_domain *domain)
|
||||||
{
|
{
|
||||||
if (domain == NULL) {
|
|
||||||
return 1;
|
|
||||||
}
|
|
||||||
|
|
||||||
/* currently only support ept */
|
/* currently only support ept */
|
||||||
if (!domain->is_tt_ept) {
|
if (!domain->is_tt_ept) {
|
||||||
ASSERT(false, "translation_table is not EPT!");
|
ASSERT(false, "translation_table is not EPT!");
|
||||||
@ -929,8 +921,6 @@ int destroy_iommu_domain(struct iommu_domain *domain)
|
|||||||
|
|
||||||
free_domain_id(domain->dom_id);
|
free_domain_id(domain->dom_id);
|
||||||
free(domain);
|
free(domain);
|
||||||
|
|
||||||
return 0;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
static int add_iommu_device(struct iommu_domain *domain, uint16_t segment,
|
static int add_iommu_device(struct iommu_domain *domain, uint16_t segment,
|
||||||
@ -1258,7 +1248,7 @@ void resume_iommu(void)
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
int init_iommu(void)
|
void init_iommu(void)
|
||||||
{
|
{
|
||||||
uint16_t bus;
|
uint16_t bus;
|
||||||
uint16_t devfun;
|
uint16_t devfun;
|
||||||
@ -1268,9 +1258,7 @@ int init_iommu(void)
|
|||||||
|
|
||||||
spinlock_init(&domain_lock);
|
spinlock_init(&domain_lock);
|
||||||
|
|
||||||
if (register_hrhd_units() != 0) {
|
register_hrhd_units();
|
||||||
return -1;
|
|
||||||
}
|
|
||||||
|
|
||||||
host_domain = create_host_domain();
|
host_domain = create_host_domain();
|
||||||
|
|
||||||
@ -1282,6 +1270,4 @@ int init_iommu(void)
|
|||||||
}
|
}
|
||||||
|
|
||||||
enable_iommu();
|
enable_iommu();
|
||||||
|
|
||||||
return 0;
|
|
||||||
}
|
}
|
||||||
|
@ -322,6 +322,9 @@ int parse_dmar_table(void)
|
|||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @post return != NULL
|
||||||
|
*/
|
||||||
struct dmar_info *get_dmar_info(void)
|
struct dmar_info *get_dmar_info(void)
|
||||||
{
|
{
|
||||||
parse_dmar_table();
|
parse_dmar_table();
|
||||||
|
@ -70,7 +70,7 @@ int common_handler_edge(struct irq_desc *desc, void *handler_data);
|
|||||||
int common_dev_handler_level(struct irq_desc *desc, void *handler_data);
|
int common_dev_handler_level(struct irq_desc *desc, void *handler_data);
|
||||||
int quick_handler_nolock(struct irq_desc *desc, void *handler_data);
|
int quick_handler_nolock(struct irq_desc *desc, void *handler_data);
|
||||||
|
|
||||||
int init_default_irqs(uint16_t cpu);
|
void init_default_irqs(uint16_t cpu);
|
||||||
|
|
||||||
void dispatch_exception(struct intr_excp_ctx *ctx);
|
void dispatch_exception(struct intr_excp_ctx *ctx);
|
||||||
void dispatch_interrupt(struct intr_excp_ctx *ctx);
|
void dispatch_interrupt(struct intr_excp_ctx *ctx);
|
||||||
@ -106,7 +106,7 @@ int exception_vmexit_handler(struct vcpu *vcpu);
|
|||||||
int interrupt_window_vmexit_handler(struct vcpu *vcpu);
|
int interrupt_window_vmexit_handler(struct vcpu *vcpu);
|
||||||
int external_interrupt_vmexit_handler(struct vcpu *vcpu);
|
int external_interrupt_vmexit_handler(struct vcpu *vcpu);
|
||||||
int acrn_handle_pending_request(struct vcpu *vcpu);
|
int acrn_handle_pending_request(struct vcpu *vcpu);
|
||||||
int interrupt_init(uint16_t pcpu_id);
|
void interrupt_init(uint16_t pcpu_id);
|
||||||
|
|
||||||
void cancel_event_injection(struct vcpu *vcpu);
|
void cancel_event_injection(struct vcpu *vcpu);
|
||||||
|
|
||||||
|
@ -134,8 +134,8 @@ union lapic_id {
|
|||||||
|
|
||||||
void write_lapic_reg32(uint32_t offset, uint32_t value);
|
void write_lapic_reg32(uint32_t offset, uint32_t value);
|
||||||
void save_lapic(struct lapic_regs *regs);
|
void save_lapic(struct lapic_regs *regs);
|
||||||
int early_init_lapic(void);
|
void early_init_lapic(void);
|
||||||
int init_lapic(uint16_t cpu_id);
|
void init_lapic(uint16_t cpu_id);
|
||||||
void send_lapic_eoi(void);
|
void send_lapic_eoi(void);
|
||||||
uint8_t get_cur_lapic_id(void);
|
uint8_t get_cur_lapic_id(void);
|
||||||
int send_startup_ipi(enum intr_cpu_startup_shorthand cpu_startup_shorthand,
|
int send_startup_ipi(enum intr_cpu_startup_shorthand cpu_startup_shorthand,
|
||||||
|
@ -480,7 +480,7 @@ struct iommu_domain *create_iommu_domain(uint16_t vm_id,
|
|||||||
uint64_t translation_table, uint32_t addr_width);
|
uint64_t translation_table, uint32_t addr_width);
|
||||||
|
|
||||||
/* Destroy the iommu domain */
|
/* Destroy the iommu domain */
|
||||||
int destroy_iommu_domain(struct iommu_domain *domain);
|
void destroy_iommu_domain(struct iommu_domain *domain);
|
||||||
|
|
||||||
/* Enable translation of iommu*/
|
/* Enable translation of iommu*/
|
||||||
void enable_iommu(void);
|
void enable_iommu(void);
|
||||||
@ -495,5 +495,5 @@ void suspend_iommu(void);
|
|||||||
void resume_iommu(void);
|
void resume_iommu(void);
|
||||||
|
|
||||||
/* iommu initialization */
|
/* iommu initialization */
|
||||||
int init_iommu(void);
|
void init_iommu(void);
|
||||||
#endif
|
#endif
|
||||||
|
Loading…
Reference in New Issue
Block a user