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HV: VMX reshuffle: put EPT check before enabling
Current EPT check runs after EPT enabling in init_exec_ctrl. This patch fixes wrong order. Signed-off-by: Edwin Zhai <edwin.zhai@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
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112b4eaa42
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@ -41,6 +41,7 @@ bool x2apic_enabled = false;
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struct cpu_capability {
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struct cpu_capability {
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uint8_t vapic_features;
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uint8_t vapic_features;
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uint8_t ept_features;
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};
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};
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static struct cpu_capability cpu_caps;
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static struct cpu_capability cpu_caps;
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@ -48,7 +49,7 @@ struct cpuinfo_x86 boot_cpu_data;
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static void bsp_boot_post(void);
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static void bsp_boot_post(void);
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static void cpu_secondary_post(void);
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static void cpu_secondary_post(void);
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static void vapic_cap_detect(void);
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static void cpu_cap_detect(void);
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static void cpu_xsave_init(void);
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static void cpu_xsave_init(void);
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static void set_current_cpu_id(uint16_t pcpu_id);
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static void set_current_cpu_id(uint16_t pcpu_id);
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static void print_hv_banner(void);
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static void print_hv_banner(void);
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@ -237,6 +238,11 @@ static int hardware_detect_support(void)
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return -ENODEV;
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return -ENODEV;
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}
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}
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if (!is_ept_supported()) {
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pr_fatal("%s, EPT not supported\n", __func__);
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return -ENODEV;
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}
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ret = check_vmx_mmu_cap();
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ret = check_vmx_mmu_cap();
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if (ret != 0) {
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if (ret != 0) {
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return ret;
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return ret;
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@ -484,7 +490,7 @@ static void bsp_boot_post(void)
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set_fs_base();
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set_fs_base();
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#endif
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#endif
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vapic_cap_detect();
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cpu_cap_detect();
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cpu_xsave_init();
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cpu_xsave_init();
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@ -838,6 +844,26 @@ static bool is_ctrl_setting_allowed(uint64_t msr_val, uint32_t ctrl)
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return ((((uint32_t)(msr_val >> 32UL)) & ctrl) == ctrl);
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return ((((uint32_t)(msr_val >> 32UL)) & ctrl) == ctrl);
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}
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}
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static void ept_cap_detect(void)
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{
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uint64_t msr_val;
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cpu_caps.ept_features = 0U;
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/* Read primary processor based VM control. */
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msr_val = msr_read(MSR_IA32_VMX_PROCBASED_CTLS);
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/* Check if secondary processor based VM control is available. */
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if ((msr_val & (((uint64_t)VMX_PROCBASED_CTLS_SECONDARY) << 32)) == 0U)
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return;
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/* Read secondary processor based VM control. */
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msr_val = msr_read(MSR_IA32_VMX_PROCBASED_CTLS2);
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if (is_ctrl_setting_allowed(msr_val, VMX_PROCBASED_CTLS2_EPT))
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cpu_caps.ept_features = 1U;
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}
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static void vapic_cap_detect(void)
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static void vapic_cap_detect(void)
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{
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{
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uint8_t features;
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uint8_t features;
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@ -880,6 +906,17 @@ static void vapic_cap_detect(void)
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cpu_caps.vapic_features = features;
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cpu_caps.vapic_features = features;
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}
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}
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static void cpu_cap_detect(void)
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{
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vapic_cap_detect();
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ept_cap_detect();
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}
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bool is_ept_supported(void)
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{
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return (cpu_caps.ept_features != 0U);
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}
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bool is_vapic_supported(void)
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bool is_vapic_supported(void)
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{
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{
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return ((cpu_caps.vapic_features & VAPIC_FEATURE_VIRT_ACCESS) != 0U);
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return ((cpu_caps.vapic_features & VAPIC_FEATURE_VIRT_ACCESS) != 0U);
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@ -144,35 +144,6 @@ uint64_t hpa2gpa(struct vm *vm, uint64_t hpa)
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| (hpa & (pg_size - 1UL)));
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| (hpa & (pg_size - 1UL)));
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}
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}
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bool is_ept_supported(void)
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{
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bool status;
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uint64_t tmp64;
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/* Read primary processor based VM control. */
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tmp64 = msr_read(MSR_IA32_VMX_PROCBASED_CTLS);
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/* Check if secondary processor based VM control is available. */
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if ((tmp64 & MMU_MEM_ATTR_BIT_EXECUTE_DISABLE) != 0U) {
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/* Read primary processor based VM control. */
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tmp64 = msr_read(MSR_IA32_VMX_PROCBASED_CTLS2);
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/* Check if EPT is supported. */
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if ((tmp64 & (((uint64_t)VMX_PROCBASED_CTLS2_EPT) << 32)) != 0U) {
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/* EPT is present. */
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status = true;
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} else {
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status = false;
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}
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} else {
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/* Secondary processor based VM control is not present */
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status = false;
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}
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return status;
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}
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int ept_violation_vmexit_handler(struct vcpu *vcpu)
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int ept_violation_vmexit_handler(struct vcpu *vcpu)
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{
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{
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int status = -EINVAL, ret;
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int status = -EINVAL, ret;
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@ -1054,14 +1054,6 @@ static void init_exec_ctrl(struct vcpu *vcpu)
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}
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}
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}
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}
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/* Check for EPT support */
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if (is_ept_supported()) {
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pr_dbg("EPT is supported");
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}
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else {
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pr_err("Error: EPT is not supported");
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}
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/* Load EPTP execution control
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/* Load EPTP execution control
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* TODO: introduce API to make this data driven based
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* TODO: introduce API to make this data driven based
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* on VMX_EPT_VPID_CAP
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* on VMX_EPT_VPID_CAP
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@ -324,6 +324,7 @@ void trampoline_start16(void);
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bool is_vapic_supported(void);
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bool is_vapic_supported(void);
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bool is_vapic_intr_delivery_supported(void);
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bool is_vapic_intr_delivery_supported(void);
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bool is_vapic_virt_reg_supported(void);
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bool is_vapic_virt_reg_supported(void);
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bool is_ept_supported(void);
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bool cpu_has_cap(uint32_t bit);
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bool cpu_has_cap(uint32_t bit);
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void load_cpu_state_data(void);
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void load_cpu_state_data(void);
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void bsp_boot_init(void);
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void bsp_boot_init(void);
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@ -376,7 +376,6 @@ static inline void clflush(volatile void *p)
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}
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}
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/* External Interfaces */
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/* External Interfaces */
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bool is_ept_supported(void);
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uint64_t create_guest_initial_paging(struct vm *vm);
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uint64_t create_guest_initial_paging(struct vm *vm);
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void destroy_ept(struct vm *vm);
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void destroy_ept(struct vm *vm);
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uint64_t gpa2hpa(struct vm *vm, uint64_t gpa);
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uint64_t gpa2hpa(struct vm *vm, uint64_t gpa);
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