From ad59375dfd1a7f8f31ae28ef3e4b90af30c0cac8 Mon Sep 17 00:00:00 2001 From: Yin Fengwei Date: Wed, 20 Jun 2018 00:36:52 +0800 Subject: [PATCH] hv: cpu_context is not only used by guest. It could be also used by host as well. So we remove GUEST from MACRO name Signed-off-by: Yin Fengwei Acked-by: Eddie Dong --- hypervisor/arch/x86/cpu.c | 34 ++++----- hypervisor/arch/x86/vmexit.c | 30 ++++---- hypervisor/arch/x86/vmx_asm.S | 70 +++++++++--------- hypervisor/include/arch/x86/guest/vcpu.h | 92 ++++++++++++++---------- 4 files changed, 121 insertions(+), 105 deletions(-) diff --git a/hypervisor/arch/x86/cpu.c b/hypervisor/arch/x86/cpu.c index bac14eb59..31ab5d1ef 100644 --- a/hypervisor/arch/x86/cpu.c +++ b/hypervisor/arch/x86/cpu.c @@ -376,55 +376,55 @@ void bsp_boot_init(void) ASSERT(NR_WORLD == 2, "Only 2 Worlds supported!"); ASSERT(offsetof(struct cpu_regs, rax) == - VMX_MACHINE_T_GUEST_RAX_OFFSET, + CPU_CONTEXT_OFFSET_RAX, "cpu_regs rax offset not match"); ASSERT(offsetof(struct cpu_regs, rbx) == - VMX_MACHINE_T_GUEST_RBX_OFFSET, + CPU_CONTEXT_OFFSET_RBX, "cpu_regs rbx offset not match"); ASSERT(offsetof(struct cpu_regs, rcx) == - VMX_MACHINE_T_GUEST_RCX_OFFSET, + CPU_CONTEXT_OFFSET_RCX, "cpu_regs rcx offset not match"); ASSERT(offsetof(struct cpu_regs, rdx) == - VMX_MACHINE_T_GUEST_RDX_OFFSET, + CPU_CONTEXT_OFFSET_RDX, "cpu_regs rdx offset not match"); ASSERT(offsetof(struct cpu_regs, rbp) == - VMX_MACHINE_T_GUEST_RBP_OFFSET, + CPU_CONTEXT_OFFSET_RBP, "cpu_regs rbp offset not match"); ASSERT(offsetof(struct cpu_regs, rsi) == - VMX_MACHINE_T_GUEST_RSI_OFFSET, + CPU_CONTEXT_OFFSET_RSI, "cpu_regs rsi offset not match"); ASSERT(offsetof(struct cpu_regs, rdi) == - VMX_MACHINE_T_GUEST_RDI_OFFSET, + CPU_CONTEXT_OFFSET_RDI, "cpu_regs rdi offset not match"); ASSERT(offsetof(struct cpu_regs, r8) == - VMX_MACHINE_T_GUEST_R8_OFFSET, + CPU_CONTEXT_OFFSET_R8, "cpu_regs r8 offset not match"); ASSERT(offsetof(struct cpu_regs, r9) == - VMX_MACHINE_T_GUEST_R9_OFFSET, + CPU_CONTEXT_OFFSET_R9, "cpu_regs r9 offset not match"); ASSERT(offsetof(struct cpu_regs, r10) == - VMX_MACHINE_T_GUEST_R10_OFFSET, + CPU_CONTEXT_OFFSET_R10, "cpu_regs r10 offset not match"); ASSERT(offsetof(struct cpu_regs, r11) == - VMX_MACHINE_T_GUEST_R11_OFFSET, + CPU_CONTEXT_OFFSET_R11, "cpu_regs r11 offset not match"); ASSERT(offsetof(struct cpu_regs, r12) == - VMX_MACHINE_T_GUEST_R12_OFFSET, + CPU_CONTEXT_OFFSET_R12, "cpu_regs r12 offset not match"); ASSERT(offsetof(struct cpu_regs, r13) == - VMX_MACHINE_T_GUEST_R13_OFFSET, + CPU_CONTEXT_OFFSET_R13, "cpu_regs r13 offset not match"); ASSERT(offsetof(struct cpu_regs, r14) == - VMX_MACHINE_T_GUEST_R14_OFFSET, + CPU_CONTEXT_OFFSET_R14, "cpu_regs r14 offset not match"); ASSERT(offsetof(struct cpu_regs, r15) == - VMX_MACHINE_T_GUEST_R15_OFFSET, + CPU_CONTEXT_OFFSET_R15, "cpu_regs r15 offset not match"); ASSERT(offsetof(struct run_context, cr2) == - VMX_MACHINE_T_GUEST_CR2_OFFSET, + CPU_CONTEXT_OFFSET_CR2, "run_context cr2 offset not match"); ASSERT(offsetof(struct run_context, ia32_spec_ctrl) == - VMX_MACHINE_T_GUEST_SPEC_CTRL_OFFSET, + CPU_CONTEXT_OFFSET_IA32_SPEC_CTRL, "run_context ia32_spec_ctrl offset not match"); __bitmap_set(CPU_BOOT_ID, &pcpu_active_bitmap); diff --git a/hypervisor/arch/x86/vmexit.c b/hypervisor/arch/x86/vmexit.c index 01d122104..4264be9db 100644 --- a/hypervisor/arch/x86/vmexit.c +++ b/hypervisor/arch/x86/vmexit.c @@ -240,22 +240,22 @@ int cr_access_vmexit_handler(struct vcpu *vcpu) struct run_context *cur_context = &vcpu->arch_vcpu.contexts[vcpu->arch_vcpu.cur_context]; static const int reg_trans_tab[] = { - [0] = VMX_MACHINE_T_GUEST_RAX_INDEX, - [1] = VMX_MACHINE_T_GUEST_RCX_INDEX, - [2] = VMX_MACHINE_T_GUEST_RDX_INDEX, - [3] = VMX_MACHINE_T_GUEST_RBX_INDEX, + [0] = CPU_CONTEXT_INDEX_RAX, + [1] = CPU_CONTEXT_INDEX_RCX, + [2] = CPU_CONTEXT_INDEX_RDX, + [3] = CPU_CONTEXT_INDEX_RBX, [4] = 0xFF, /* for sp reg, should not be used, just for init */ - [5] = VMX_MACHINE_T_GUEST_RBP_INDEX, - [6] = VMX_MACHINE_T_GUEST_RSI_INDEX, - [7] = VMX_MACHINE_T_GUEST_RDI_INDEX, - [8] = VMX_MACHINE_T_GUEST_R8_INDEX, - [9] = VMX_MACHINE_T_GUEST_R9_INDEX, - [10] = VMX_MACHINE_T_GUEST_R10_INDEX, - [11] = VMX_MACHINE_T_GUEST_R11_INDEX, - [12] = VMX_MACHINE_T_GUEST_R12_INDEX, - [13] = VMX_MACHINE_T_GUEST_R13_INDEX, - [14] = VMX_MACHINE_T_GUEST_R14_INDEX, - [15] = VMX_MACHINE_T_GUEST_R15_INDEX + [5] = CPU_CONTEXT_INDEX_RBP, + [6] = CPU_CONTEXT_INDEX_RSI, + [7] = CPU_CONTEXT_INDEX_RDI, + [8] = CPU_CONTEXT_INDEX_R8, + [9] = CPU_CONTEXT_INDEX_R9, + [10] = CPU_CONTEXT_INDEX_R10, + [11] = CPU_CONTEXT_INDEX_R11, + [12] = CPU_CONTEXT_INDEX_R12, + [13] = CPU_CONTEXT_INDEX_R13, + [14] = CPU_CONTEXT_INDEX_R14, + [15] = CPU_CONTEXT_INDEX_R15, }; int idx = VM_EXIT_CR_ACCESS_REG_IDX(vcpu->arch_vcpu.exit_qualification); diff --git a/hypervisor/arch/x86/vmx_asm.S b/hypervisor/arch/x86/vmx_asm.S index 0714ef89c..c8d4348fe 100644 --- a/hypervisor/arch/x86/vmx_asm.S +++ b/hypervisor/arch/x86/vmx_asm.S @@ -59,7 +59,7 @@ vmx_vmrun: /* 0x00000048 = MSR_IA32_SPEC_CTRL */ movl $0x00000048,%ecx - mov VMX_MACHINE_T_GUEST_SPEC_CTRL_OFFSET(%rdi),%rax + mov CPU_CONTEXT_OFFSET_IA32_SPEC_CTRL(%rdi),%rax movl $0,%edx wrmsr @@ -80,25 +80,25 @@ next: /* Compare the launch flag to see if launching (1) or resuming (0) */ cmp $VM_LAUNCH, %rsi - mov VMX_MACHINE_T_GUEST_CR2_OFFSET(%rdi),%rax + mov CPU_CONTEXT_OFFSET_CR2(%rdi),%rax mov %rax,%cr2 - mov VMX_MACHINE_T_GUEST_RAX_OFFSET(%rdi),%rax - mov VMX_MACHINE_T_GUEST_RBX_OFFSET(%rdi),%rbx - mov VMX_MACHINE_T_GUEST_RCX_OFFSET(%rdi),%rcx - mov VMX_MACHINE_T_GUEST_RDX_OFFSET(%rdi),%rdx - mov VMX_MACHINE_T_GUEST_RBP_OFFSET(%rdi),%rbp - mov VMX_MACHINE_T_GUEST_RSI_OFFSET(%rdi),%rsi - mov VMX_MACHINE_T_GUEST_R8_OFFSET(%rdi),%r8 - mov VMX_MACHINE_T_GUEST_R9_OFFSET(%rdi),%r9 - mov VMX_MACHINE_T_GUEST_R10_OFFSET(%rdi),%r10 - mov VMX_MACHINE_T_GUEST_R11_OFFSET(%rdi),%r11 - mov VMX_MACHINE_T_GUEST_R12_OFFSET(%rdi),%r12 - mov VMX_MACHINE_T_GUEST_R13_OFFSET(%rdi),%r13 - mov VMX_MACHINE_T_GUEST_R14_OFFSET(%rdi),%r14 - mov VMX_MACHINE_T_GUEST_R15_OFFSET(%rdi),%r15 + mov CPU_CONTEXT_OFFSET_RAX(%rdi),%rax + mov CPU_CONTEXT_OFFSET_RBX(%rdi),%rbx + mov CPU_CONTEXT_OFFSET_RCX(%rdi),%rcx + mov CPU_CONTEXT_OFFSET_RDX(%rdi),%rdx + mov CPU_CONTEXT_OFFSET_RBP(%rdi),%rbp + mov CPU_CONTEXT_OFFSET_RSI(%rdi),%rsi + mov CPU_CONTEXT_OFFSET_R8(%rdi),%r8 + mov CPU_CONTEXT_OFFSET_R9(%rdi),%r9 + mov CPU_CONTEXT_OFFSET_R10(%rdi),%r10 + mov CPU_CONTEXT_OFFSET_R11(%rdi),%r11 + mov CPU_CONTEXT_OFFSET_R12(%rdi),%r12 + mov CPU_CONTEXT_OFFSET_R13(%rdi),%r13 + mov CPU_CONTEXT_OFFSET_R14(%rdi),%r14 + mov CPU_CONTEXT_OFFSET_R15(%rdi),%r15 - mov VMX_MACHINE_T_GUEST_RDI_OFFSET(%rdi),%rdi + mov CPU_CONTEXT_OFFSET_RDI(%rdi),%rdi /* Execute appropriate VMX instruction */ je vm_launch @@ -122,30 +122,30 @@ vm_exit: xchg 0(%rsp),%rdi /* Save current GPRs to guest state area */ - mov %rax,VMX_MACHINE_T_GUEST_RAX_OFFSET(%rdi) + mov %rax,CPU_CONTEXT_OFFSET_RAX(%rdi) mov %cr2,%rax - mov %rax,VMX_MACHINE_T_GUEST_CR2_OFFSET(%rdi) + mov %rax,CPU_CONTEXT_OFFSET_CR2(%rdi) - mov %rbx,VMX_MACHINE_T_GUEST_RBX_OFFSET(%rdi) - mov %rcx,VMX_MACHINE_T_GUEST_RCX_OFFSET(%rdi) - mov %rdx,VMX_MACHINE_T_GUEST_RDX_OFFSET(%rdi) - mov %rbp,VMX_MACHINE_T_GUEST_RBP_OFFSET(%rdi) - mov %rsi,VMX_MACHINE_T_GUEST_RSI_OFFSET(%rdi) - mov %r8,VMX_MACHINE_T_GUEST_R8_OFFSET(%rdi) - mov %r9,VMX_MACHINE_T_GUEST_R9_OFFSET(%rdi) - mov %r10,VMX_MACHINE_T_GUEST_R10_OFFSET(%rdi) - mov %r11,VMX_MACHINE_T_GUEST_R11_OFFSET(%rdi) - mov %r12,VMX_MACHINE_T_GUEST_R12_OFFSET(%rdi) - mov %r13,VMX_MACHINE_T_GUEST_R13_OFFSET(%rdi) - mov %r14,VMX_MACHINE_T_GUEST_R14_OFFSET(%rdi) - mov %r15,VMX_MACHINE_T_GUEST_R15_OFFSET(%rdi) + mov %rbx,CPU_CONTEXT_OFFSET_RBX(%rdi) + mov %rcx,CPU_CONTEXT_OFFSET_RCX(%rdi) + mov %rdx,CPU_CONTEXT_OFFSET_RDX(%rdi) + mov %rbp,CPU_CONTEXT_OFFSET_RBP(%rdi) + mov %rsi,CPU_CONTEXT_OFFSET_RSI(%rdi) + mov %r8,CPU_CONTEXT_OFFSET_R8(%rdi) + mov %r9,CPU_CONTEXT_OFFSET_R9(%rdi) + mov %r10,CPU_CONTEXT_OFFSET_R10(%rdi) + mov %r11,CPU_CONTEXT_OFFSET_R11(%rdi) + mov %r12,CPU_CONTEXT_OFFSET_R12(%rdi) + mov %r13,CPU_CONTEXT_OFFSET_R13(%rdi) + mov %r14,CPU_CONTEXT_OFFSET_R14(%rdi) + mov %r15,CPU_CONTEXT_OFFSET_R15(%rdi) /* Load guest RDI off host stack and into RDX */ mov 0(%rsp),%rdx /* Save guest RDI to guest state area */ - mov %rdx,VMX_MACHINE_T_GUEST_RDI_OFFSET(%rdi) + mov %rdx,CPU_CONTEXT_OFFSET_RDI(%rdi) /* Save RDI to RSI for later SPEC_CTRL save*/ mov %rdi,%rsi @@ -192,7 +192,7 @@ vm_eval_error: */ movl $0x00000048,%ecx rdmsr - mov %rax,VMX_MACHINE_T_GUEST_SPEC_CTRL_OFFSET(%rsi) + mov %rax,CPU_CONTEXT_OFFSET_IA32_SPEC_CTRL(%rsi) /* 0x1 = SPEC_ENABLE_IBRS */ movl $0x1,%eax movl $0,%edx @@ -215,7 +215,7 @@ ibrs_opt: */ movl $0x00000048,%ecx rdmsr - mov %rax,VMX_MACHINE_T_GUEST_SPEC_CTRL_OFFSET(%rsi) + mov %rax,CPU_CONTEXT_OFFSET_IA32_SPEC_CTRL(%rsi) /* 0x2 = SPEC_ENABLE_STIBP */ movl $0x2,%eax movl $0,%edx diff --git a/hypervisor/include/arch/x86/guest/vcpu.h b/hypervisor/include/arch/x86/guest/vcpu.h index b20515a0c..fa2e6fb4e 100644 --- a/hypervisor/include/arch/x86/guest/vcpu.h +++ b/hypervisor/include/arch/x86/guest/vcpu.h @@ -16,45 +16,61 @@ #define NUM_GPRS 15 #define GUEST_STATE_AREA_SIZE 512 -/* Indexes of GPRs saved / restored for guest */ -#define VMX_MACHINE_T_GUEST_RAX_INDEX 0 -#define VMX_MACHINE_T_GUEST_RBX_INDEX 1 -#define VMX_MACHINE_T_GUEST_RCX_INDEX 2 -#define VMX_MACHINE_T_GUEST_RDX_INDEX 3 -#define VMX_MACHINE_T_GUEST_RBP_INDEX 4 -#define VMX_MACHINE_T_GUEST_RSI_INDEX 5 -#define VMX_MACHINE_T_GUEST_R8_INDEX 6 -#define VMX_MACHINE_T_GUEST_R9_INDEX 7 -#define VMX_MACHINE_T_GUEST_R10_INDEX 8 -#define VMX_MACHINE_T_GUEST_R11_INDEX 9 -#define VMX_MACHINE_T_GUEST_R12_INDEX 10 -#define VMX_MACHINE_T_GUEST_R13_INDEX 11 -#define VMX_MACHINE_T_GUEST_R14_INDEX 12 -#define VMX_MACHINE_T_GUEST_R15_INDEX 13 -#define VMX_MACHINE_T_GUEST_RDI_INDEX 14 +#define CPU_CONTEXT_INDEX_RAX 0 +#define CPU_CONTEXT_INDEX_RBX 1 +#define CPU_CONTEXT_INDEX_RCX 2 +#define CPU_CONTEXT_INDEX_RDX 3 +#define CPU_CONTEXT_INDEX_RBP 4 +#define CPU_CONTEXT_INDEX_RSI 5 +#define CPU_CONTEXT_INDEX_R8 6 +#define CPU_CONTEXT_INDEX_R9 7 +#define CPU_CONTEXT_INDEX_R10 8 +#define CPU_CONTEXT_INDEX_R11 9 +#define CPU_CONTEXT_INDEX_R12 10 +#define CPU_CONTEXT_INDEX_R13 11 +#define CPU_CONTEXT_INDEX_R14 12 +#define CPU_CONTEXT_INDEX_R15 13 +#define CPU_CONTEXT_INDEX_RDI 14 -/* Offsets of GPRs for guest within the VCPU data structure */ -#define VMX_MACHINE_T_GUEST_RAX_OFFSET (VMX_MACHINE_T_GUEST_RAX_INDEX*REG_SIZE) -#define VMX_MACHINE_T_GUEST_RBX_OFFSET (VMX_MACHINE_T_GUEST_RBX_INDEX*REG_SIZE) -#define VMX_MACHINE_T_GUEST_RCX_OFFSET (VMX_MACHINE_T_GUEST_RCX_INDEX*REG_SIZE) -#define VMX_MACHINE_T_GUEST_RDX_OFFSET (VMX_MACHINE_T_GUEST_RDX_INDEX*REG_SIZE) -#define VMX_MACHINE_T_GUEST_RBP_OFFSET (VMX_MACHINE_T_GUEST_RBP_INDEX*REG_SIZE) -#define VMX_MACHINE_T_GUEST_RSI_OFFSET (VMX_MACHINE_T_GUEST_RSI_INDEX*REG_SIZE) -#define VMX_MACHINE_T_GUEST_RDI_OFFSET (VMX_MACHINE_T_GUEST_RDI_INDEX*REG_SIZE) -#define VMX_MACHINE_T_GUEST_R8_OFFSET (VMX_MACHINE_T_GUEST_R8_INDEX*REG_SIZE) -#define VMX_MACHINE_T_GUEST_R9_OFFSET (VMX_MACHINE_T_GUEST_R9_INDEX*REG_SIZE) -#define VMX_MACHINE_T_GUEST_R10_OFFSET (VMX_MACHINE_T_GUEST_R10_INDEX*REG_SIZE) -#define VMX_MACHINE_T_GUEST_R11_OFFSET (VMX_MACHINE_T_GUEST_R11_INDEX*REG_SIZE) -#define VMX_MACHINE_T_GUEST_R12_OFFSET (VMX_MACHINE_T_GUEST_R12_INDEX*REG_SIZE) -#define VMX_MACHINE_T_GUEST_R13_OFFSET (VMX_MACHINE_T_GUEST_R13_INDEX*REG_SIZE) -#define VMX_MACHINE_T_GUEST_R14_OFFSET (VMX_MACHINE_T_GUEST_R14_INDEX*REG_SIZE) -#define VMX_MACHINE_T_GUEST_R15_OFFSET (VMX_MACHINE_T_GUEST_R15_INDEX*REG_SIZE) - -/* Hard-coded offset of cr2 in struct run_context!! */ -#define VMX_MACHINE_T_GUEST_CR2_OFFSET (128) - -/* Hard-coded offset of cr2 in struct run_context!! */ -#define VMX_MACHINE_T_GUEST_SPEC_CTRL_OFFSET (192) +#define CPU_CONTEXT_OFFSET_RAX 0 +#define CPU_CONTEXT_OFFSET_RBX 8 +#define CPU_CONTEXT_OFFSET_RCX 16 +#define CPU_CONTEXT_OFFSET_RDX 24 +#define CPU_CONTEXT_OFFSET_RBP 32 +#define CPU_CONTEXT_OFFSET_RSI 40 +#define CPU_CONTEXT_OFFSET_R8 48 +#define CPU_CONTEXT_OFFSET_R9 56 +#define CPU_CONTEXT_OFFSET_R10 64 +#define CPU_CONTEXT_OFFSET_R11 72 +#define CPU_CONTEXT_OFFSET_R12 80 +#define CPU_CONTEXT_OFFSET_R13 88 +#define CPU_CONTEXT_OFFSET_R14 96 +#define CPU_CONTEXT_OFFSET_R15 104 +#define CPU_CONTEXT_OFFSET_RDI 112 +#define CPU_CONTEXT_OFFSET_CR0 120 +#define CPU_CONTEXT_OFFSET_CR2 128 +#define CPU_CONTEXT_OFFSET_CR3 136 +#define CPU_CONTEXT_OFFSET_CR4 144 +#define CPU_CONTEXT_OFFSET_RIP 152 +#define CPU_CONTEXT_OFFSET_RSP 160 +#define CPU_CONTEXT_OFFSET_RFLAGS 168 +#define CPU_CONTEXT_OFFSET_TSC_OFFSET 184 +#define CPU_CONTEXT_OFFSET_IA32_SPEC_CTRL 192 +#define CPU_CONTEXT_OFFSET_IA32_STAR 200 +#define CPU_CONTEXT_OFFSET_IA32_LSTAR 208 +#define CPU_CONTEXT_OFFSET_IA32_FMASK 216 +#define CPU_CONTEXT_OFFSET_IA32_KERNEL_GS_BASE 224 +#define CPU_CONTEXT_OFFSET_CS 280 +#define CPU_CONTEXT_OFFSET_SS 312 +#define CPU_CONTEXT_OFFSET_DS 344 +#define CPU_CONTEXT_OFFSET_ES 376 +#define CPU_CONTEXT_OFFSET_FS 408 +#define CPU_CONTEXT_OFFSET_GS 440 +#define CPU_CONTEXT_OFFSET_TR 472 +#define CPU_CONTEXT_OFFSET_IDTR 504 +#define CPU_CONTEXT_OFFSET_LDTR 536 +#define CPU_CONTEXT_OFFSET_GDTR 568 +#define CPU_CONTEXT_OFFSET_FXSTORE_GUEST_AREA 608 /*sizes of various registers within the VCPU data structure */ #define VMX_CPU_S_FXSAVE_GUEST_AREA_SIZE GUEST_STATE_AREA_SIZE