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https://github.com/projectacrn/acrn-hypervisor.git
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HV: refine 'decode_instruction() function
update: 1. remove 'struct mem_io *'from input arguments 2. return 'opsize' instead of status. 3. rename 'vmm_decode_instruction()' Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
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@ -400,7 +400,8 @@ int ept_violation_vmexit_handler(struct vcpu *vcpu)
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*/
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*/
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mmio->paddr = gpa;
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mmio->paddr = gpa;
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if (decode_instruction(vcpu, mmio) != 0)
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mmio->access_size = decode_instruction(vcpu);
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if (mmio->access_size == 0)
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goto out;
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goto out;
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list_for_each(pos, &vcpu->vm->mmio_list) {
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list_for_each(pos, &vcpu->vm->mmio_list) {
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@ -2107,7 +2107,7 @@ decode_moffset(struct vie *vie)
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}
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}
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int
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int
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vmm_decode_instruction(__unused struct vcpu *vcpu, __unused uint64_t gla,
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__decode_instruction(__unused struct vcpu *vcpu, __unused uint64_t gla,
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enum vm_cpu_mode cpu_mode, int cs_d, struct vie *vie)
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enum vm_cpu_mode cpu_mode, int cs_d, struct vie *vie)
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{
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{
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if (decode_prefixes(vie, cpu_mode, cs_d))
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if (decode_prefixes(vie, cpu_mode, cs_d))
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@ -86,10 +86,10 @@ void vie_init(struct vie *vie, const char *inst_bytes, uint32_t inst_length);
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* in VIE_INVALID_GLA instead.
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* in VIE_INVALID_GLA instead.
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*/
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*/
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#define VIE_INVALID_GLA (1UL << 63) /* a non-canonical address */
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#define VIE_INVALID_GLA (1UL << 63) /* a non-canonical address */
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int vmm_decode_instruction(struct vcpu *vcpu, uint64_t gla,
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int __decode_instruction(struct vcpu *vcpu, uint64_t gla,
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enum vm_cpu_mode cpu_mode, int csd, struct vie *vie);
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enum vm_cpu_mode cpu_mode, int csd, struct vie *vie);
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int emulate_instruction(struct vcpu *vcpu, struct mem_io *mmio);
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int emulate_instruction(struct vcpu *vcpu, struct mem_io *mmio);
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int decode_instruction(struct vcpu *vcpu, struct mem_io *mmio);
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uint8_t decode_instruction(struct vcpu *vcpu);
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#endif /* _VMM_INSTRUCTION_EMUL_H_ */
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#endif /* _VMM_INSTRUCTION_EMUL_H_ */
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@ -380,7 +380,7 @@ void vm_gva2gpa(struct vcpu *vcpu, uint64_t gva, uint64_t *gpa)
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vcpu->arch_vcpu.contexts[vcpu->arch_vcpu.cur_context].cr3, gva);
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vcpu->arch_vcpu.contexts[vcpu->arch_vcpu.cur_context].cr3, gva);
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}
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}
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int decode_instruction(struct vcpu *vcpu, struct mem_io *mmio)
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uint8_t decode_instruction(struct vcpu *vcpu)
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{
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{
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uint64_t guest_rip_gva, guest_rip_gpa;
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uint64_t guest_rip_gva, guest_rip_gpa;
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char *guest_rip_hva;
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char *guest_rip_hva;
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@ -388,7 +388,6 @@ int decode_instruction(struct vcpu *vcpu, struct mem_io *mmio)
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uint32_t csar;
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uint32_t csar;
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int retval = 0;
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int retval = 0;
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enum vm_cpu_mode cpu_mode;
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enum vm_cpu_mode cpu_mode;
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int i;
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guest_rip_gva =
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guest_rip_gva =
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vcpu->arch_vcpu.contexts[vcpu->arch_vcpu.cur_context].rip;
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vcpu->arch_vcpu.contexts[vcpu->arch_vcpu.cur_context].rip;
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@ -399,7 +398,7 @@ int decode_instruction(struct vcpu *vcpu, struct mem_io *mmio)
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guest_rip_hva = GPA2HVA(vcpu->vm, guest_rip_gpa);
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guest_rip_hva = GPA2HVA(vcpu->vm, guest_rip_gpa);
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emul_cnx = &per_cpu(g_inst_ctxt, vcpu->pcpu_id);
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emul_cnx = &per_cpu(g_inst_ctxt, vcpu->pcpu_id);
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emul_cnx->mmio = mmio;
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emul_cnx->mmio = &vcpu->mmio;
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emul_cnx->vcpu = vcpu;
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emul_cnx->vcpu = vcpu;
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/* by now, HVA <-> HPA is 1:1 mapping, so use hpa is OK*/
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/* by now, HVA <-> HPA is 1:1 mapping, so use hpa is OK*/
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@ -410,29 +409,18 @@ int decode_instruction(struct vcpu *vcpu, struct mem_io *mmio)
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csar = exec_vmread(VMX_GUEST_CS_ATTR);
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csar = exec_vmread(VMX_GUEST_CS_ATTR);
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cpu_mode = get_vmx_cpu_mode();
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cpu_mode = get_vmx_cpu_mode();
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mmio->private_data = emul_cnx;
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vcpu->mmio.private_data = emul_cnx;
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retval = vmm_decode_instruction(vcpu, guest_rip_gva,
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retval = __decode_instruction(vcpu, guest_rip_gva,
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cpu_mode, SEG_DESC_DEF32(csar), &emul_cnx->vie);
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cpu_mode, SEG_DESC_DEF32(csar), &emul_cnx->vie);
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mmio->access_size = emul_cnx->vie.opsize;
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if (retval != 0) {
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if (retval != 0) {
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/* dump to instruction when decoding failed */
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pr_err("decode instruction failed @ 0x%016llx:",
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pr_err("decode following instruction failed @ 0x%016llx:",
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exec_vmread(VMX_GUEST_RIP));
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exec_vmread(VMX_GUEST_RIP));
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for (i = 0; i < emul_cnx->vie.num_valid; i++) {
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return 0;
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if (i >= VIE_INST_SIZE)
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break;
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if (i == 0)
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pr_err("\n");
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pr_err("%d=%02hhx ",
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i, emul_cnx->vie.inst[i]);
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}
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}
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}
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return retval;
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return emul_cnx->vie.opsize;
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}
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}
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int emulate_instruction(struct vcpu *vcpu, struct mem_io *mmio)
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int emulate_instruction(struct vcpu *vcpu, struct mem_io *mmio)
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@ -2178,7 +2178,7 @@ int apic_access_vmexit_handler(struct vcpu *vcpu)
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vlapic = vcpu->arch_vcpu.vlapic;
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vlapic = vcpu->arch_vcpu.vlapic;
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decode_instruction(vcpu, &vcpu->mmio);
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decode_instruction(vcpu);
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if (access_type == 1) {
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if (access_type == 1) {
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if (!emulate_instruction(vcpu, &vcpu->mmio))
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if (!emulate_instruction(vcpu, &vcpu->mmio))
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vlapic_write(vlapic, 1, offset, vcpu->mmio.value);
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vlapic_write(vlapic, 1, offset, vcpu->mmio.value);
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