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HV: refine 'decode_instruction() function

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update:
   1. remove 'struct mem_io *'from input arguments
   2. return 'opsize' instead of status.
   3. rename 'vmm_decode_instruction()'

Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
This commit is contained in:
Yonghua Huang 2018-05-21 18:29:13 +08:00 committed by lijinxia
parent fcd79325e1
commit aee1931ee6
5 changed files with 14 additions and 25 deletions
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3
hypervisor/arch/x86/ept.c
View File

@ -400,7 +400,8 @@ int ept_violation_vmexit_handler(struct vcpu *vcpu)
*/
mmio->paddr = gpa;
if (decode_instruction(vcpu, mmio) != 0)
mmio->access_size = decode_instruction(vcpu);
if (mmio->access_size == 0)
goto out;
list_for_each(pos, &vcpu->vm->mmio_list) {

2
hypervisor/arch/x86/guest/instr_emul.c
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@ -2107,7 +2107,7 @@ decode_moffset(struct vie *vie)
}
int
vmm_decode_instruction(__unused struct vcpu *vcpu, __unused uint64_t gla,
__decode_instruction(__unused struct vcpu *vcpu, __unused uint64_t gla,
enum vm_cpu_mode cpu_mode, int cs_d, struct vie *vie)
{
if (decode_prefixes(vie, cpu_mode, cs_d))

4
hypervisor/arch/x86/guest/instr_emul.h
View File

@ -86,10 +86,10 @@ void vie_init(struct vie *vie, const char *inst_bytes, uint32_t inst_length);
* in VIE_INVALID_GLA instead.
*/
#define VIE_INVALID_GLA (1UL << 63) /* a non-canonical address */
int vmm_decode_instruction(struct vcpu *vcpu, uint64_t gla,
int __decode_instruction(struct vcpu *vcpu, uint64_t gla,
enum vm_cpu_mode cpu_mode, int csd, struct vie *vie);
int emulate_instruction(struct vcpu *vcpu, struct mem_io *mmio);
int decode_instruction(struct vcpu *vcpu, struct mem_io *mmio);
uint8_t decode_instruction(struct vcpu *vcpu);
#endif /* _VMM_INSTRUCTION_EMUL_H_ */

26
hypervisor/arch/x86/guest/instr_emul_wrapper.c
View File

@ -380,7 +380,7 @@ void vm_gva2gpa(struct vcpu *vcpu, uint64_t gva, uint64_t *gpa)
vcpu->arch_vcpu.contexts[vcpu->arch_vcpu.cur_context].cr3, gva);
}
int decode_instruction(struct vcpu *vcpu, struct mem_io *mmio)
uint8_t decode_instruction(struct vcpu *vcpu)
{
uint64_t guest_rip_gva, guest_rip_gpa;
char *guest_rip_hva;
@ -388,7 +388,6 @@ int decode_instruction(struct vcpu *vcpu, struct mem_io *mmio)
uint32_t csar;
int retval = 0;
enum vm_cpu_mode cpu_mode;
int i;
guest_rip_gva =
vcpu->arch_vcpu.contexts[vcpu->arch_vcpu.cur_context].rip;
@ -399,7 +398,7 @@ int decode_instruction(struct vcpu *vcpu, struct mem_io *mmio)
guest_rip_hva = GPA2HVA(vcpu->vm, guest_rip_gpa);
emul_cnx = &per_cpu(g_inst_ctxt, vcpu->pcpu_id);
emul_cnx->mmio = mmio;
emul_cnx->mmio = &vcpu->mmio;
emul_cnx->vcpu = vcpu;
/* by now, HVA <-> HPA is 1:1 mapping, so use hpa is OK*/
@ -410,29 +409,18 @@ int decode_instruction(struct vcpu *vcpu, struct mem_io *mmio)
csar = exec_vmread(VMX_GUEST_CS_ATTR);
cpu_mode = get_vmx_cpu_mode();
mmio->private_data = emul_cnx;
vcpu->mmio.private_data = emul_cnx;
retval = vmm_decode_instruction(vcpu, guest_rip_gva,
retval = __decode_instruction(vcpu, guest_rip_gva,
cpu_mode, SEG_DESC_DEF32(csar), &emul_cnx->vie);
mmio->access_size = emul_cnx->vie.opsize;
if (retval != 0) {
/* dump to instruction when decoding failed */
pr_err("decode following instruction failed @ 0x%016llx:",
pr_err("decode instruction failed @ 0x%016llx:",
exec_vmread(VMX_GUEST_RIP));
for (i = 0; i < emul_cnx->vie.num_valid; i++) {
if (i >= VIE_INST_SIZE)
break;
if (i == 0)
pr_err("\n");
pr_err("%d=%02hhx ",
i, emul_cnx->vie.inst[i]);
}
return 0;
}
return retval;
return emul_cnx->vie.opsize;
}
int emulate_instruction(struct vcpu *vcpu, struct mem_io *mmio)

2
hypervisor/arch/x86/guest/vlapic.c
View File

@ -2178,7 +2178,7 @@ int apic_access_vmexit_handler(struct vcpu *vcpu)
vlapic = vcpu->arch_vcpu.vlapic;
decode_instruction(vcpu, &vcpu->mmio);
decode_instruction(vcpu);
if (access_type == 1) {
if (!emulate_instruction(vcpu, &vcpu->mmio))
vlapic_write(vlapic, 1, offset, vcpu->mmio.value);