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DM: Mark thre_int_pending as true when THR is empty
This patch marks thre_int_pending as true when THR is empty. Tracked-On: #2713 Signed-off-by: Eddie Dong <eddie.dong@intel.com> Signed-off-by: Kaige Fu <kaige.fu@intel.com>
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@ -368,19 +368,6 @@ uart_intr_reason(struct uart_vdev *uart)
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return IIR_NOPEND;
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}
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static void
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uart_reset(struct uart_vdev *uart)
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{
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uint16_t divisor;
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divisor = DEFAULT_RCLK / DEFAULT_BAUD / 16;
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uart->dll = divisor;
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uart->dlh = divisor >> 16;
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uart->msr = modem_status(uart->mcr);
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rxfifo_reset(uart, 1); /* no fifo until enabled by software */
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}
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/*
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* Toggle the COM port's intr pin depending on whether or not we have an
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* interrupt condition to report to the processor.
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@ -398,6 +385,24 @@ uart_toggle_intr(struct uart_vdev *uart)
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(*uart->intr_assert)(uart->arg);
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}
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static void
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uart_reset(struct uart_vdev *uart)
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{
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uint16_t divisor;
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divisor = DEFAULT_RCLK / DEFAULT_BAUD / 16;
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uart->dll = divisor;
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uart->dlh = divisor >> 16;
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uart->msr = modem_status(uart->mcr);
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rxfifo_reset(uart, 1); /* no fifo until enabled by software */
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/* set the right reset state here */
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uart->ier = 0;
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uart->thre_int_pending = true;
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uart_toggle_intr(uart);
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}
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static void
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uart_drain(int fd, enum ev_type ev, void *arg)
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{
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@ -454,12 +459,17 @@ uart_write(struct uart_vdev *uart, int offset, uint8_t value)
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switch (offset) {
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case REG_DATA:
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/* THRE INT is cleared after writing data into THR register */
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uart->thre_int_pending = false;
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uart_toggle_intr(uart);
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if (uart->mcr & MCR_LOOPBACK) {
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if (rxfifo_putchar(uart, value) != 0)
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uart->lsr |= LSR_OE;
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} else if (uart->tty.opened) {
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ttywrite(&uart->tty, value);
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} /* else drop on floor */
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/* We view the transmission is completed immediately */
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uart->thre_int_pending = true;
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break;
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case REG_IER:
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@ -580,10 +590,14 @@ uart_read(struct uart_vdev *uart, int offset)
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intr_reason = uart_intr_reason(uart);
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/*
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* Deal with side effects of reading the IIR register
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* Reading the IIR register clears the THRE INT.
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*/
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if (intr_reason == IIR_TXRDY)
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if (intr_reason == IIR_TXRDY) {
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uart->thre_int_pending = false;
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uart_toggle_intr(uart);
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}
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/* THRE INT is re-generated since the THR register is always empty in here */
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uart->thre_int_pending = true;
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iir |= intr_reason;
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