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acrn-config: fix hang issue for board EHL (hybrid_rt)

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P2SB_BAR_ADDR related macros should only be defined in misc_cfg.h only when
p2sb is enabled in scenario xml.

Tracked-On: #5340
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
This commit is contained in:
dongshen 2020-09-10 15:24:42 -07:00 committed by wenlingz
parent 4c55a2ad8e
commit b2b1aee7fb
3 changed files with 3 additions and 11 deletions
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4
misc/acrn-config/board_config/board_info_h.py
View File

@ -91,9 +91,11 @@ def generate_file(config):
# generate HI_MMIO_START/HI_MMIO_END
find_hi_mmio_window(config)
p2sb = common.get_leaf_tag_map_bool(common.SCENARIO_INFO_FILE, "mmio_resources", "p2sb")
if (common.VM_TYPES.get(0) is not None and
scenario_cfg_lib.VM_DB[common.VM_TYPES[0]]['load_type'] == "PRE_LAUNCHED_VM"
and board_cfg_lib.is_p2sb_passthru_possible()):
and board_cfg_lib.is_p2sb_passthru_possible()
and p2sb.get(0, False)):
print("", file=config)
print("#define P2SB_VGPIO_DM_ENABLED", file=config)

5
misc/vm_configs/scenarios/hybrid/ehl-crb-b/misc_cfg.h
View File

@ -74,11 +74,6 @@
#define VM2_VCPU_CLOS {0U}
#endif
#define VM0_PASSTHROUGH_TPM
#define VM0_TPM_BUFFER_BASE_ADDR 0xFED40000UL
#define VM0_TPM_BUFFER_BASE_ADDR_GPA 0xFED40000UL
#define VM0_TPM_BUFFER_SIZE 0x5000UL
#define VM0_CONFIG_PCI_DEV_NUM 1U

5
misc/vm_configs/scenarios/hybrid_rt/ehl-crb-b/misc_cfg.h
View File

@ -74,11 +74,6 @@
#define VM2_VCPU_CLOS {0U}
#endif
#define VM0_PASSTHROUGH_TPM
#define VM0_TPM_BUFFER_BASE_ADDR 0xFED40000UL
#define VM0_TPM_BUFFER_BASE_ADDR_GPA 0xFED40000UL
#define VM0_TPM_BUFFER_SIZE 0x5000UL
#define VM0_CONFIG_PCI_DEV_NUM 4U
#define VM2_CONFIG_PCI_DEV_NUM 1U