diff --git a/hypervisor/arch/x86/assign.c b/hypervisor/arch/x86/assign.c index 649666bc2..69fc38292 100644 --- a/hypervisor/arch/x86/assign.c +++ b/hypervisor/arch/x86/assign.c @@ -392,7 +392,7 @@ static void ptdev_intr_handle_irq(struct acrn_vm *vm, } if (trigger_lvl) { - if (entry->polarity) { + if (entry->polarity != 0U) { vioapic_set_irq(vm, virt_sid->intx_id.pin, GSI_SET_LOW); } else { @@ -400,7 +400,7 @@ static void ptdev_intr_handle_irq(struct acrn_vm *vm, GSI_SET_HIGH); } } else { - if (entry->polarity) { + if (entry->polarity != 0U) { vioapic_set_irq(vm, virt_sid->intx_id.pin, GSI_FALLING_PULSE); } else { @@ -503,7 +503,7 @@ void ptdev_intx_ack(struct acrn_vm *vm, uint8_t virt_pin, */ switch (vpin_src) { case PTDEV_VPIN_IOAPIC: - if (entry->polarity) { + if (entry->polarity != 0U) { vioapic_set_irq(vm, virt_pin, GSI_SET_HIGH); } else { vioapic_set_irq(vm, virt_pin, GSI_SET_LOW); diff --git a/hypervisor/arch/x86/guest/guest.c b/hypervisor/arch/x86/guest/guest.c index fb9e2cbc7..b5c7eb83f 100644 --- a/hypervisor/arch/x86/guest/guest.c +++ b/hypervisor/arch/x86/guest/guest.c @@ -39,7 +39,7 @@ uint64_t vcpumask2pcpumask(struct acrn_vm *vm, uint64_t vdmask) struct acrn_vcpu *vcpu; for (vcpu_id = 0U; vcpu_id < vm->hw.created_vcpus; vcpu_id++) { - if (vdmask & (1U << vcpu_id)) { + if ((vdmask & (1UL << vcpu_id)) != 0UL) { vcpu = vcpu_from_vid(vm, vcpu_id); bitmap_set_lock(vcpu->pcpu_id, &dmask); } diff --git a/hypervisor/arch/x86/guest/vlapic.c b/hypervisor/arch/x86/guest/vlapic.c index 0bbc9d189..28f0fba6c 100644 --- a/hypervisor/arch/x86/guest/vlapic.c +++ b/hypervisor/arch/x86/guest/vlapic.c @@ -1039,7 +1039,7 @@ vlapic_calcdest(struct acrn_vm *vm, uint64_t *dmask, uint32_t dest, *dmask = 0UL; amask = vm_active_cpus(vm); for (vcpu_id = 0U; vcpu_id < vm->hw.created_vcpus; vcpu_id++) { - if (amask & (1U << vcpu_id)) { + if ((amask & (1UL << vcpu_id)) != 0UL) { vlapic = vm_lapic_from_vcpu_id(vm, vcpu_id); if (is_x2apic_enabled(vlapic)){ @@ -1281,7 +1281,7 @@ vlapic_icrlo_write_handler(struct acrn_vlapic *vlapic) } for (vcpu_id = 0U; vcpu_id < vlapic->vm->hw.created_vcpus; vcpu_id++) { - if (dmask & (1U << vcpu_id)) { + if ((dmask & (1UL << vcpu_id)) != 0UL) { target_vcpu = vcpu_from_vid(vlapic->vm, vcpu_id); if (mode == APIC_DELMODE_FIXED) { @@ -1823,7 +1823,7 @@ vlapic_deliver_intr(struct acrn_vm *vm, bool level, uint32_t dest, bool phys, for (vcpu_id = 0U; vcpu_id < vm->hw.created_vcpus; vcpu_id++) { struct acrn_vlapic *vlapic; - if (dmask & (1U << vcpu_id)) { + if ((dmask & (1UL << vcpu_id)) != 0UL) { target_vcpu = vcpu_from_vid(vm, vcpu_id); /* only make request when vlapic enabled */ @@ -1986,7 +1986,7 @@ vlapic_set_local_intr(struct acrn_vm *vm, uint16_t vcpu_id_arg, uint32_t vector) } error = 0; for (vcpu_id = 0U; vcpu_id < vm->hw.created_vcpus; vcpu_id++) { - if (dmask & (1U << vcpu_id)) { + if ((dmask & (1UL << vcpu_id)) != 0UL) { vlapic = vm_lapic_from_vcpu_id(vm, vcpu_id); error = vlapic_trigger_lvt(vlapic, vector); if (error != 0) { diff --git a/hypervisor/arch/x86/guest/vm.c b/hypervisor/arch/x86/guest/vm.c index 3012c59fb..34fec7e57 100644 --- a/hypervisor/arch/x86/guest/vm.c +++ b/hypervisor/arch/x86/guest/vm.c @@ -363,7 +363,7 @@ int prepare_vm(uint16_t pcpu_id) for (i = 1U; i < vm_desc->vm_hw_num_cores; i++) prepare_vcpu(vm, vm_desc->vm_pcpu_ids[i]); - if (!vm_sw_loader) { + if (vm_sw_loader == NULL) { vm_sw_loader = general_sw_loader; } @@ -404,7 +404,7 @@ int prepare_vm0(void) } } - if (!vm_sw_loader) { + if (vm_sw_loader == NULL) { vm_sw_loader = general_sw_loader; } diff --git a/hypervisor/arch/x86/mmu.c b/hypervisor/arch/x86/mmu.c index 2a1cba027..b834fb232 100644 --- a/hypervisor/arch/x86/mmu.c +++ b/hypervisor/arch/x86/mmu.c @@ -247,8 +247,8 @@ void init_paging(void) /* align to 2MB */ high64_max_ram = (e820_mem.mem_top + PDE_SIZE - 1UL) & PDE_MASK; - if (high64_max_ram > (CONFIG_PLATFORM_RAM_SIZE + PLATFORM_LO_MMIO_SIZE) || - high64_max_ram < (1UL << 32U)) { + if ((high64_max_ram > (CONFIG_PLATFORM_RAM_SIZE + PLATFORM_LO_MMIO_SIZE)) || + (high64_max_ram < (1UL << 32U))) { panic("Please configure HV_ADDRESS_SPACE correctly!\n"); } @@ -262,7 +262,7 @@ void init_paging(void) if (entry->type == E820_TYPE_RAM) { if (entry->baseaddr < (1UL << 32U)) { uint64_t end = entry->baseaddr + entry->length; - if (end < (1UL << 32U) && (end > low32_max_ram)) { + if ((end < (1UL << 32U)) && (end > low32_max_ram)) { low32_max_ram = end; } } diff --git a/hypervisor/boot/sbl/abl_seed_parse.c b/hypervisor/boot/sbl/abl_seed_parse.c index bf90d33c5..780f521b5 100644 --- a/hypervisor/boot/sbl/abl_seed_parse.c +++ b/hypervisor/boot/sbl/abl_seed_parse.c @@ -142,7 +142,7 @@ bool abl_seed_parse(struct acrn_vm *vm, char *cmdline, char *out_arg, uint32_t o (void)memset((void *)arg, ' ', len); /* Convert the param_addr to SOS GPA and copy to caller */ - if (out_arg) { + if (out_arg != NULL) { snprintf(out_arg, out_len, "%s0x%X ", dev_sec_info_arg, hva2gpa(vm, param_addr)); } diff --git a/hypervisor/boot/sbl/sbl_seed_parse.c b/hypervisor/boot/sbl/sbl_seed_parse.c index 6b9462a57..3627dce6a 100644 --- a/hypervisor/boot/sbl/sbl_seed_parse.c +++ b/hypervisor/boot/sbl/sbl_seed_parse.c @@ -179,7 +179,7 @@ bool sbl_seed_parse(struct acrn_vm *vm, char *cmdline, char *out_arg, uint32_t o (void)memset((void *)arg, ' ', len); /* Convert the param_addr to SOS GPA and copy to caller */ - if (out_arg) { + if (out_arg != NULL) { snprintf(out_arg, out_len, "%s0x%X ", boot_params_arg, hva2gpa(vm, param_addr)); } diff --git a/hypervisor/debug/profiling.c b/hypervisor/debug/profiling.c index 431512ed7..0cb21b674 100644 --- a/hypervisor/debug/profiling.c +++ b/hypervisor/debug/profiling.c @@ -982,7 +982,7 @@ int32_t profiling_set_control(struct acrn_vm *vm, uint64_t addr) { uint64_t old_switch; uint64_t new_switch; - uint64_t i; + uint16_t i; struct profiling_control prof_control; @@ -1005,12 +1005,12 @@ int32_t profiling_set_control(struct acrn_vm *vm, uint64_t addr) " old_switch: %llu sep_collection_switch: %llu!", old_switch, sep_collection_switch); - for (i = 0U; i < (uint64_t)MAX_SEP_FEATURE_ID; i++) { - if ((new_switch ^ old_switch) & (0x1U << i)) { + for (i = 0U; i < (uint16_t)MAX_SEP_FEATURE_ID; i++) { + if (((new_switch ^ old_switch) & (0x1UL << i)) != 0UL) { switch (i) { case CORE_PMU_SAMPLING: case CORE_PMU_COUNTING: - if (new_switch & (0x1U << i)) { + if ((new_switch & (0x1UL << i)) != 0UL) { profiling_start_pmu(); } else { profiling_stop_pmu(); @@ -1042,8 +1042,8 @@ int32_t profiling_set_control(struct acrn_vm *vm, uint64_t addr) if (socwatch_collection_switch != 0UL) { dev_dbg(ACRN_DBG_PROFILING, "%s: socwatch start collection invoked!", __func__); - for (i = 0U; i < (uint64_t)MAX_SOCWATCH_FEATURE_ID; i++) { - if (socwatch_collection_switch & (0x1U << i)) { + for (i = 0U; i < (uint16_t)MAX_SOCWATCH_FEATURE_ID; i++) { + if ((socwatch_collection_switch & (0x1UL << i)) != 0UL) { switch (i) { case SOCWATCH_COMMAND: break; diff --git a/hypervisor/dm/vpci/msi.c b/hypervisor/dm/vpci/msi.c index 90115375c..ae95df8eb 100644 --- a/hypervisor/dm/vpci/msi.c +++ b/hypervisor/dm/vpci/msi.c @@ -57,7 +57,7 @@ static int vmsi_remap(struct pci_vdev *vdev, bool enable) /* Read the MSI capability structure from virtual device */ addrlo = pci_vdev_read_cfg_u32(vdev, capoff + PCIR_MSI_ADDR); - if (msgctrl & PCIM_MSICTRL_64BIT) { + if ((msgctrl & PCIM_MSICTRL_64BIT) != 0U) { msgdata = pci_vdev_read_cfg_u16(vdev, capoff + PCIR_MSI_DATA_64BIT); addrhi = pci_vdev_read_cfg_u32(vdev, capoff + PCIR_MSI_ADDR_HIGH); } else { @@ -82,7 +82,7 @@ static int vmsi_remap(struct pci_vdev *vdev, bool enable) /* Update MSI Capability structure to physical device */ pci_pdev_write_cfg(pbdf, capoff + PCIR_MSI_ADDR, 0x4U, (uint32_t)info.pmsi_addr); - if (msgctrl & PCIM_MSICTRL_64BIT) { + if ((msgctrl & PCIM_MSICTRL_64BIT) != 0U) { pci_pdev_write_cfg(pbdf, capoff + PCIR_MSI_ADDR_HIGH, 0x4U, (uint32_t)(info.pmsi_addr >> 32U)); pci_pdev_write_cfg(pbdf, capoff + PCIR_MSI_DATA_64BIT, 0x2U, (uint16_t)info.pmsi_data); } else { @@ -130,7 +130,8 @@ static int vmsi_cfgwrite(struct pci_vdev *vdev, uint32_t offset, uint32_t bytes, pci_vdev_write_cfg(vdev, offset, bytes, val); /* Do remap if MSI Enable bit is being changed */ - if (((offset - vdev->msi.capoff) == PCIR_MSI_CTRL) && ((msgctrl ^ val) & PCIM_MSICTRL_MSI_ENABLE)) { + if (((offset - vdev->msi.capoff) == PCIR_MSI_CTRL) && + (((msgctrl ^ val) & PCIM_MSICTRL_MSI_ENABLE) != 0U)) { enable = ((val & PCIM_MSICTRL_MSI_ENABLE) != 0U); (void)vmsi_remap(vdev, enable); } else { @@ -173,7 +174,7 @@ void populate_msi_struct(struct pci_vdev *vdev) * (msgctrl & PCIM_MSICTRL_VECTOR). * We'll let the guest manipulate them directly. */ - len = (msgctrl & PCIM_MSICTRL_64BIT) ? 14U : 10U; + len = ((msgctrl & PCIM_MSICTRL_64BIT) != 0U) ? 14U : 10U; vdev->msi.caplen = len; /* Assign MSI handler for configuration read and write */ diff --git a/hypervisor/dm/vpci/msix.c b/hypervisor/dm/vpci/msix.c index 10385e746..d08eea301 100644 --- a/hypervisor/dm/vpci/msix.c +++ b/hypervisor/dm/vpci/msix.c @@ -169,7 +169,7 @@ static int vmsix_cfgwrite(struct pci_vdev *vdev, uint32_t offset, uint32_t bytes /* Writing Message Control field? */ if ((offset - vdev->msix.capoff) == PCIR_MSIX_CTRL) { if (((msgctrl ^ val) & PCIM_MSIXCTRL_MSIX_ENABLE) != 0U) { - if (val & PCIM_MSIXCTRL_MSIX_ENABLE) { + if ((val & PCIM_MSIXCTRL_MSIX_ENABLE) != 0U) { (void)vmsix_remap(vdev, true); } else { (void)vmsix_remap(vdev, false); diff --git a/hypervisor/dm/vpci/vpci.c b/hypervisor/dm/vpci/vpci.c index 7d6b0a4f4..3c6b05f86 100644 --- a/hypervisor/dm/vpci/vpci.c +++ b/hypervisor/dm/vpci/vpci.c @@ -45,7 +45,7 @@ static void pci_cfg_clear_cache(struct pci_addr_info *pi) { pi->cached_bdf.value = 0xFFFFU; pi->cached_reg = 0U; - pi->cached_enable = 0U; + pi->cached_enable = false; } static uint32_t pci_cfg_io_read(struct acrn_vm *vm, uint16_t addr, size_t bytes) @@ -96,8 +96,7 @@ static void pci_cfg_io_write(struct acrn_vm *vm, uint16_t addr, size_t bytes, pi->cached_bdf.bits.f = (uint8_t)(val >> 8U) & PCI_FUNCMAX; pi->cached_reg = val & PCI_REGMAX; - pi->cached_enable = - (val & PCI_CFG_ENABLE) == PCI_CFG_ENABLE; + pi->cached_enable = ((val & PCI_CFG_ENABLE) == PCI_CFG_ENABLE); } } else if (is_cfg_data(addr)) { if (pi->cached_enable) { diff --git a/hypervisor/dm/vpic.c b/hypervisor/dm/vpic.c index e5588fd20..30f01b75c 100644 --- a/hypervisor/dm/vpic.c +++ b/hypervisor/dm/vpic.c @@ -411,7 +411,7 @@ static void vpic_set_pinstate(struct acrn_vpic *vpic, uint8_t pin, i8259 = &vpic->i8259[pin >> 3U]; old_lvl = i8259->pin_state[pin & 0x7U]; - if (level) { + if (level != 0U) { i8259->pin_state[pin & 0x7U] = 1U; } else { i8259->pin_state[pin & 0x7U] = 0U; @@ -432,7 +432,7 @@ static void vpic_set_pinstate(struct acrn_vpic *vpic, uint8_t pin, } } else { dev_dbg(ACRN_DBG_PIC, "pic pin%hhu: %s, ignored\n", - pin, level ? "asserted" : "deasserted"); + pin, (level != 0U) ? "asserted" : "deasserted"); } vpic_notify_intr(vpic); diff --git a/hypervisor/include/common/ptdev.h b/hypervisor/include/common/ptdev.h index 8f97beab0..771441d81 100644 --- a/hypervisor/include/common/ptdev.h +++ b/hypervisor/include/common/ptdev.h @@ -40,7 +40,6 @@ union source_id { struct ptdev_msi_info { uint64_t vmsi_addr; /* virt msi_addr */ uint32_t vmsi_data; /* virt msi_data */ - uint16_t vmsi_ctl; /* virt msi_ctl */ uint64_t pmsi_addr; /* phys msi_addr */ uint32_t pmsi_data; /* phys msi_data */ int is_msix; /* 0-MSI, 1-MSIX */ diff --git a/hypervisor/include/dm/vpci.h b/hypervisor/include/dm/vpci.h index 4cfb6618e..722558fbb 100644 --- a/hypervisor/include/dm/vpci.h +++ b/hypervisor/include/dm/vpci.h @@ -120,7 +120,8 @@ struct pci_vdev { struct pci_addr_info { union pci_bdf cached_bdf; - uint32_t cached_reg, cached_enable; + uint32_t cached_reg; + bool cached_enable; }; struct vpci_ops {