hv: treewide: fix 'Prototype and definition name mismatch'

Fix the parameter name mismatch between API declaration and definition.

v2 -> v3:
 * Fix two more violations which are missed in previous report.
   shell_puts and console_write

v1 -> v2:
 * Replace 'ret_desc' with 'desc'

Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
This commit is contained in:
Shiqing Gao 2018-08-01 14:59:53 +08:00 committed by lijinxia
parent f42878ee3a
commit b4a2ff5022
17 changed files with 35 additions and 35 deletions

View File

@ -1484,14 +1484,14 @@ vmm_emulate_instruction(struct vcpu *vcpu, uint64_t gpa, struct instr_emul_vie *
}
int
vie_alignment_check(uint8_t cpl, uint8_t size, uint64_t cr0, uint64_t rf,
vie_alignment_check(uint8_t cpl, uint8_t size, uint64_t cr0, uint64_t rflags,
uint64_t gla)
{
ASSERT(size == 1U || size == 2U || size == 4U || size == 8U,
"%s: invalid size %hhu", __func__, size);
ASSERT(cpl <= 3U, "%s: invalid cpl %d", __func__, cpl);
if (cpl != 3U || (cr0 & CR0_AM) == 0UL || (rf & PSL_AC) == 0UL) {
if (cpl != 3U || (cr0 & CR0_AM) == 0UL || (rflags & PSL_AC) == 0UL) {
return 0;
}

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@ -45,7 +45,7 @@ typedef int (*mem_region_write_t)(struct vcpu *vcpu, uint64_t gpa,
* Emulate the decoded 'vie' instruction.
*
* The callbacks 'mrr' and 'mrw' emulate reads and writes to the memory region
* containing 'gpa'. 'mrarg' is an opaque argument that is passed into the
* containing 'gpa'. 'memarg' is an opaque argument that is passed into the
* callback functions.
*
* 'void *vm' should be 'struct vm *' when called from kernel context and
@ -54,7 +54,7 @@ typedef int (*mem_region_write_t)(struct vcpu *vcpu, uint64_t gpa,
*/
int vmm_emulate_instruction(struct vcpu *vcpu, uint64_t gpa, struct instr_emul_vie *vie,
struct vm_guest_paging *paging, mem_region_read_t mrr,
mem_region_write_t mrw, void *mrarg);
mem_region_write_t mrw, void *memarg);
int vie_update_register(struct vcpu *vcpu, enum cpu_reg_name reg,
uint64_t val_arg, uint8_t size);
@ -62,7 +62,7 @@ int vie_update_register(struct vcpu *vcpu, enum cpu_reg_name reg,
/*
* Returns 1 if an alignment check exception should be injected and 0 otherwise.
*/
int vie_alignment_check(uint8_t cpl, uint8_t operand_size, uint64_t cr0,
int vie_alignment_check(uint8_t cpl, uint8_t size, uint64_t cr0,
uint64_t rflags, uint64_t gla);
/* Returns 1 if the 'gla' is not canonical and 0 otherwise. */

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@ -95,12 +95,12 @@ int vm_set_register(struct vcpu *vcpu, enum cpu_reg_name reg, uint64_t val)
}
int vm_set_seg_desc(struct vcpu *vcpu, enum cpu_reg_name seg,
struct seg_desc *ret_desc)
struct seg_desc *desc)
{
int error;
uint32_t base, limit, access;
if ((vcpu == NULL) || (ret_desc == NULL)) {
if ((vcpu == NULL) || (desc == NULL)) {
return -EINVAL;
}
@ -113,9 +113,9 @@ int vm_set_seg_desc(struct vcpu *vcpu, enum cpu_reg_name seg,
return -EINVAL;
}
exec_vmwrite(base, ret_desc->base);
exec_vmwrite32(limit, ret_desc->limit);
exec_vmwrite32(access, ret_desc->access);
exec_vmwrite(base, desc->base);
exec_vmwrite32(limit, desc->limit);
exec_vmwrite32(access, desc->access);
return 0;
}

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@ -251,8 +251,8 @@ struct instr_emul_ctxt {
int vm_get_register(struct vcpu *vcpu, enum cpu_reg_name reg, uint64_t *retval);
int vm_set_register(struct vcpu *vcpu, enum cpu_reg_name reg, uint64_t val);
int vm_get_seg_desc(struct vcpu *vcpu, enum cpu_reg_name reg,
struct seg_desc *ret_desc);
int vm_set_seg_desc(struct vcpu *vcpu, enum cpu_reg_name reg,
int vm_get_seg_desc(struct vcpu *vcpu, enum cpu_reg_name seg,
struct seg_desc *desc);
int vm_set_seg_desc(struct vcpu *vcpu, enum cpu_reg_name seg,
struct seg_desc *desc);
#endif

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@ -1978,7 +1978,7 @@ vlapic_rdmsr(struct vcpu *vcpu, uint32_t msr, uint64_t *rval)
}
int
vlapic_wrmsr(struct vcpu *vcpu, uint32_t msr, uint64_t val)
vlapic_wrmsr(struct vcpu *vcpu, uint32_t msr, uint64_t wval)
{
int error = 0;
uint32_t offset;
@ -1988,21 +1988,21 @@ vlapic_wrmsr(struct vcpu *vcpu, uint32_t msr, uint64_t val)
switch (msr) {
case MSR_IA32_APIC_BASE:
error = vlapic_set_apicbase(vlapic, val);
error = vlapic_set_apicbase(vlapic, wval);
break;
case MSR_IA32_TSC_DEADLINE:
vlapic_set_tsc_deadline_msr(vlapic, val);
vlapic_set_tsc_deadline_msr(vlapic, wval);
break;
default:
offset = x2apic_msr_to_regoff(msr);
error = vlapic_write(vlapic, 0, offset, val);
error = vlapic_write(vlapic, 0, offset, wval);
break;
}
dev_dbg(ACRN_DBG_LAPIC, "cpu[%hu] wrmsr: %x val=%#x",
vcpu->vcpu_id, msr, val);
dev_dbg(ACRN_DBG_LAPIC, "cpu[%hu] wrmsr: %x wval=%#x",
vcpu->vcpu_id, msr, wval);
return error;
}

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@ -172,7 +172,7 @@ static spinlock_t domain_lock;
static struct iommu_domain *host_domain;
static struct list_head iommu_domains;
static void dmar_register_hrhd(struct dmar_drhd_rt *drhd_rt);
static void dmar_register_hrhd(struct dmar_drhd_rt *dmar_uint);
static struct dmar_drhd_rt *device_to_dmaru(uint16_t segment, uint8_t bus,
uint8_t devfun);
static void register_hrhd_units(void)

View File

@ -119,9 +119,9 @@ int shell_show_vmexit_profile(__unused int argc, __unused char **argv);
int shell_dump_logbuf(int argc, char **argv);
int shell_loglevel(int argc, char **argv);
int shell_cpuid(int argc, char **argv);
struct shell_cmd *shell_find_cmd(const char *cmd);
struct shell_cmd *shell_find_cmd(const char *cmd_str);
int shell_process_cmd(char *p_input_line);
void shell_puts(const char *str_ptr);
void shell_puts(const char *string_ptr);
int shell_trigger_crash(int argc, char **argv);
#endif /* SHELL_INTER_H */

View File

@ -57,7 +57,7 @@ int vlapic_pending_intr(struct acrn_vlapic *vlapic, uint32_t *vecptr);
void vlapic_intr_accepted(struct acrn_vlapic *vlapic, uint32_t vector);
struct acrn_vlapic *vm_lapic_from_pcpuid(struct vm *vm, uint16_t pcpu_id);
bool is_vlapic_msr(uint32_t num);
bool is_vlapic_msr(uint32_t msr);
int vlapic_rdmsr(struct vcpu *vcpu, uint32_t msr, uint64_t *rval);
int vlapic_wrmsr(struct vcpu *vcpu, uint32_t msr, uint64_t wval);
@ -70,7 +70,7 @@ int vlapic_write_mmio_reg(struct vcpu *vcpu, uint64_t gpa,
* Signals to the LAPIC that an interrupt at 'vector' needs to be generated
* to the 'cpu', the state is recorded in IRR.
*/
int vlapic_set_intr(struct vcpu *vcpu, uint32_t vector, bool trig);
int vlapic_set_intr(struct vcpu *vcpu, uint32_t vector, bool level);
#define LAPIC_TRIG_LEVEL true
#define LAPIC_TRIG_EDGE false

View File

@ -180,7 +180,7 @@ void resume_vm(struct vm *vm);
void resume_vm_from_s3(struct vm *vm, uint32_t wakeup_vec);
int start_vm(struct vm *vm);
int reset_vm(struct vm *vm);
int create_vm(struct vm_description *vm_desc, struct vm **vm);
int create_vm(struct vm_description *vm_desc, struct vm **rtn_vm);
int prepare_vm0(void);
#ifdef CONFIG_VM0_DESC
void vm_fixup(struct vm *vm);

View File

@ -128,6 +128,6 @@ int32_t dm_emulate_mmio_post(struct vcpu *vcpu);
int32_t emulate_io(struct vcpu *vcpu, struct io_request *io_req);
void emulate_io_post(struct vcpu *vcpu);
int32_t acrn_insert_request_wait(struct vcpu *vcpu, struct io_request *req);
int32_t acrn_insert_request_wait(struct vcpu *vcpu, struct io_request *io_req);
#endif /* IOREQ_H */

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@ -55,7 +55,7 @@ int common_dev_handler_level(struct irq_desc *desc,
__unused void *handler_data);
int quick_handler_nolock(struct irq_desc *desc, __unused void *handler_data);
void init_default_irqs(uint16_t cpu);
void init_default_irqs(uint16_t cpu_id);
void dispatch_exception(struct intr_excp_ctx *ctx);
void dispatch_interrupt(struct intr_excp_ctx *ctx);

View File

@ -135,7 +135,7 @@ union lapic_id_reg {
void write_lapic_reg32(uint32_t offset, uint32_t value);
void save_lapic(struct lapic_regs *regs);
void early_init_lapic(void);
void init_lapic(uint16_t cpu_id);
void init_lapic(uint16_t pcpu_id);
void send_lapic_eoi(void);
uint8_t get_cur_lapic_id(void);
int send_startup_ipi(enum intr_cpu_startup_shorthand cpu_startup_shorthand,

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@ -141,6 +141,6 @@ void switch_world(struct vcpu *vcpu, int next_world);
bool initialize_trusty(struct vcpu *vcpu, uint64_t param);
void destroy_secure_world(struct vm *vm);
void trusty_set_dseed(void *dseed, uint8_t seed_num);
void trusty_set_dseed(void *dseed, uint8_t dseed_num);
#endif /* TRUSTY_H_ */

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@ -247,12 +247,12 @@ int32_t hcall_set_vm_memory_regions(struct vm *vm, uint64_t param);
*
* @param vm Pointer to VM data structure
* @param vmid ID of the VM
* @param param guest physical address. This gpa points to
* @param wp_gpa guest physical address. This gpa points to
* struct wp_data
*
* @return 0 on success, non-zero on error.
*/
int32_t hcall_write_protect_page(struct vm *vm, uint16_t vmid, uint64_t param);
int32_t hcall_write_protect_page(struct vm *vm, uint16_t vmid, uint64_t wp_gpa);
/**
* @brief remap PCI MSI interrupt

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@ -67,7 +67,7 @@ extern spinlock_t ptdev_lock;
extern struct ptdev_remapping_info invalid_entry;
extern spinlock_t softirq_dev_lock;
void ptdev_softirq(__unused uint16_t cpu);
void ptdev_softirq(__unused uint16_t cpu_id);
void ptdev_init(void);
void ptdev_release_all_entries(struct vm *vm);

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@ -18,14 +18,14 @@ void console_init(void);
/** Writes a given number of characters to the console.
*
* @param str A pointer to character array to write.
* @param s A pointer to character array to write.
* @param len The number of characters to write.
*
* @return The number of characters written or -1 if an error occurred
* and no character was written.
*/
int console_write(const char *s_arg, size_t len);
int console_write(const char *s, size_t len);
/** Writes a single character to the console.
*

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@ -31,7 +31,7 @@ void *memchr(const void *void_s, int c, size_t n);
int strcmp(const char *s1_arg, const char *s2_arg);
int strncmp(const char *s1_arg, const char *s2_arg, size_t n_arg);
char *strcpy_s(char *d_arg, size_t dmax, const char *s_arg);
char *strncpy_s(char *d_arg, size_t dmax, const char *s, size_t slen_arg);
char *strncpy_s(char *d_arg, size_t dmax, const char *s_arg, size_t slen_arg);
char *strchr(const char *s_arg, int ch);
void mdelay(uint32_t loop_count_arg);
size_t strnlen_s(const char *str_arg, size_t maxlen_arg);