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hv: switch IA32_TSC_AUX between host/guest through VM Controls
Currently guest IA32_TSC_AUX MSR is loaded manually right before VM entry, and saved right after VM exit. This patch enables VM-Entry Control and VM-Exit Control to switch MSR IA32_TSC_AUX between host and guest automatically. This helps to keep vcpu_thread() function and struct acrn_vcpu cleaner. Also it removes the dead code of intercepting IA32_TSC_AUX. Tracked-On: #1867 Signed-off-by: Zide Chen <zide.chen@intel.com> Reviewed-by: Li, Fei1 <fei1.li@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
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@@ -176,6 +176,23 @@ struct cpu_context {
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struct ext_context ext_ctx;
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};
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/* Intel SDM 24.8.2, the address must be 16-byte aligned */
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struct msr_store_entry {
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uint32_t msr_num;
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uint32_t reserved;
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uint64_t value;
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} __aligned(16);
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enum {
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MSR_AREA_TSC_AUX = 0,
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MSR_AREA_COUNT,
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};
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struct msr_store_area {
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struct msr_store_entry guest[MSR_AREA_COUNT];
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struct msr_store_entry host[MSR_AREA_COUNT];
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};
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struct acrn_vcpu_arch {
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/* vmcs region for this vcpu, MUST be 4KB-aligned */
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uint8_t vmcs[CPU_PAGE_SIZE];
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@@ -199,9 +216,6 @@ struct acrn_vcpu_arch {
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uint32_t irq_window_enabled;
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uint32_t nrexits;
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/* Auxiliary TSC value */
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uint64_t msr_tsc_aux;
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/* VCPU context state information */
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uint32_t exit_reason;
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uint32_t idt_vectoring_info;
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@@ -217,6 +231,8 @@ struct acrn_vcpu_arch {
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bool inject_event_pending;
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struct event_injection_info inject_info;
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/* List of MSRS to be stored and loaded on VM exits or VM entries */
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struct msr_store_area msr_area;
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} __aligned(CPU_PAGE_SIZE);
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struct acrn_vm;
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@@ -242,14 +258,6 @@ struct acrn_vcpu {
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struct io_request req; /* used by io/ept emulation */
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/* save guest msr tsc aux register.
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* Before VMENTRY, save guest MSR_TSC_AUX to this fields.
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* After VMEXIT, restore this fields to guest MSR_TSC_AUX.
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* This is only temperary workaround. Once MSR emulation
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* is enabled, we should remove this fields and related
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* code.
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*/
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uint64_t msr_tsc_aux_guest;
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uint64_t guest_msrs[IDX_MAX_MSR];
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#ifdef CONFIG_MTRR_ENABLED
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struct mtrr_state mtrr;
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