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https://github.com/projectacrn/acrn-hypervisor.git
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acrn-config: remove a function that generates ve820 file
1. To keep align with acrn-hypervisor source code, remove a function that generates ve820 file. Tracked-On: #3854 Signed-off-by: Wei Liu <weix.w.liu@intel.com> Acked-by: Victor Sun <victor.sun@intel.com>
This commit is contained in:
Wei Liu
wenlingz
parent
27b6c82c0f
commit
b62d439bf1
@ -12,14 +12,13 @@ import board_c
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import pci_devices_h
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import acpi_platform_h
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import misc_cfg_h
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import ve820_c
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import new_board_kconfig
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ACRN_PATH = board_cfg_lib.SOURCE_ROOT_DIR
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ACRN_CONFIG = ACRN_PATH + "hypervisor/arch/x86/configs/"
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ACRN_DEFAULT_PLATFORM = ACRN_PATH + "hypervisor/include/arch/x86/default_acpi_info.h"
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GEN_FILE = ["pci_devices.h", "board.c", "_acpi_info.h", "misc_cfg.h", "ve820.c", ".config"]
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GEN_FILE = ["pci_devices.h", "board.c", "_acpi_info.h", "misc_cfg.h", ".config"]
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def need_gen_new_board_config(board_name):
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@ -76,14 +75,12 @@ def main(args):
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config_board = config_dirs[0] + '/' + GEN_FILE[1]
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config_platform = config_dirs[0] + '/' + board + GEN_FILE[2]
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config_misc_cfg = config_dirs[0] + '/' + GEN_FILE[3]
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config_ve820 = config_dirs[0] + '/' + GEN_FILE[4]
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config_board_kconfig = ACRN_CONFIG + board + GEN_FILE[5]
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config_board_kconfig = ACRN_CONFIG + board + GEN_FILE[4]
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config_srcs.append(config_pci)
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config_srcs.append(config_board)
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config_srcs.append(config_platform)
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config_srcs.append(config_misc_cfg)
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config_srcs.append(config_ve820)
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config_srcs.append(config_board_kconfig)
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# generate board.c
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@ -100,13 +97,7 @@ def main(args):
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with open(config_platform, 'w+') as config:
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acpi_platform_h.generate_file(config, ACRN_DEFAULT_PLATFORM)
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# generate acpi_platform.h
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with open(config_ve820, 'w+') as config:
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err_dic = ve820_c.generate_file(config)
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if err_dic:
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return err_dic
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# generate acpi_platform.h
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# generate misc_cfg.h
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with open(config_misc_cfg, 'w+') as config:
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err_dic = misc_cfg_h.generate_file(config)
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if err_dic:
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@ -1,221 +0,0 @@
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# Copyright (C) 2019 Intel Corporation. All rights reserved.
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#
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# SPDX-License-Identifier: BSD-3-Clause
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#
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import sys
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import board_cfg_lib
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FOUR_GBYTE = 4 * 1024 * 1024 * 1024
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LOW_MEM_TO_PCI_HOLE = 0x20000000
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def ve820_per_launch(config, hpa_size, hpa2_size):
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"""
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Start to generate board.c
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:param config: it is a file pointer of board information for writing to
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"""
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(err_dic, board_name) = board_cfg_lib.get_board_name()
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if err_dic:
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return err_dic
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board_name = board_cfg_lib.undline_name(board_name)
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pre_vm_cnt = board_cfg_lib.get_pre_launch_cnt(board_cfg_lib.SCENARIO_INFO_FILE)
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low_mem_to_pci_hole_len = '0xA0000000'
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low_mem_to_pci_hole = '0x20000000'
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pci_hole_addr = '0xe0000000'
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pci_hole_len = '0x20000000'
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start_low_hpa = 0x100000
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low_mem_hpa_len = []
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high_mem_hpa_len = []
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high_mem_hpa2_len = []
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high_mem_hpa2_addr = []
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# pre_launch memroy: mem_size is the ve820 length
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print("#include <e820.h>", file=config)
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print("#include <vm.h>", file=config)
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print("", file=config)
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for i in range(pre_vm_cnt):
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if (int(hpa_size[i], 16) <= 512 * 1024 * 1024):
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low_mem_hpa_len.append(int(hpa_size[i], 16) - 1 * 1024 * 1024)
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high_mem_hpa_len.append(0)
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else:
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low_mem_hpa_len.append(511 * 1024 * 1024)
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high_mem_hpa_len.append(int(hpa_size[i], 16) - 512 * 1024 * 1024)
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if len(hpa2_size) == 0:
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high_mem_hpa2_len.append(0)
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else:
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high_mem_hpa2_len.append(int(hpa2_size[i], 16))
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#HPA2 is always allocated in >4G space.
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if (high_mem_hpa_len[i] != 0) and (high_mem_hpa2_len[i] != 0):
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high_mem_hpa2_addr.append(FOUR_GBYTE + high_mem_hpa_len[i])
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else:
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high_mem_hpa2_addr.append(FOUR_GBYTE)
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if (high_mem_hpa_len[i] != 0) and (high_mem_hpa2_len[i] != 0):
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print("#define VM{}_VE820_ENTRIES_{}\t{}U".format(i, board_name, 7), file=config)
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elif (high_mem_hpa_len[i] != 0) or (high_mem_hpa2_len[i] != 0):
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print("#define VM{}_VE820_ENTRIES_{}\t{}U".format(i, board_name, 6), file=config)
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else:
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print("#define VM{}_VE820_ENTRIES_{}\t{}U".format(i, board_name, 5), file=config)
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for i in range(pre_vm_cnt):
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print("static const struct e820_entry vm{}_ve820_entry[{}] = {{".format(
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i, "VM{}_VE820_ENTRIES_{}".format(i, board_name)), file=config)
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print("\t{\t/* usable RAM under 1MB */", file=config)
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print("\t\t.baseaddr = 0x0UL,", file=config)
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print("\t\t.length = 0xF0000UL,\t\t/* 960KB */", file=config)
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print("\t\t.type = E820_TYPE_RAM", file=config)
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print("\t},", file=config)
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print("", file=config)
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print("\t{\t/* mptable */", file=config)
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print("\t\t.baseaddr = 0xF0000UL,\t\t/* 960KB */", file=config)
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print("\t\t.length = 0x10000UL,\t\t/* 64KB */", file=config)
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print("\t\t.type = E820_TYPE_RESERVED", file=config)
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print("\t},", file=config)
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print("", file=config)
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print("\t{\t/* lowmem */", file=config)
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print("\t\t.baseaddr = {}UL,\t\t/* 1MB */".format(
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hex(start_low_hpa)), file=config)
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print("\t\t.length = {}UL,\t/* {}MB */".format(
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hex(low_mem_hpa_len[i]), low_mem_hpa_len[i] / 1024 / 1024), file=config)
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print("\t\t.type = E820_TYPE_RAM", file=config)
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print("\t},", file=config)
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print("", file=config)
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print("\t{\t/* between lowmem and PCI hole */", file=config)
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print("\t\t.baseaddr = {}UL,\t/* {}MB */".format(
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low_mem_to_pci_hole, int(low_mem_to_pci_hole, 16) / 1024 / 1024), file=config)
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print("\t\t.length = {}UL,\t/* {}MB */".format(
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low_mem_to_pci_hole_len, int(low_mem_to_pci_hole_len, 16) / 1024 / 1024), file=config)
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print("\t\t.type = E820_TYPE_RESERVED", file=config)
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print("\t},", file=config)
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print("", file=config)
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print("\t{\t/* between PCI hole and 4 GB */", file=config)
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print("\t\t.baseaddr = {}UL,\t/* {}GB */".format(
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hex(int(pci_hole_addr, 16)), int(pci_hole_addr, 16) / 1024 / 1024 / 1024), file=config)
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print("\t\t.length = {}UL,\t/* {}MB */".format(
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hex(int(pci_hole_len, 16)), int(pci_hole_len, 16) / 1024 / 1024), file=config)
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print("\t\t.type = E820_TYPE_RESERVED", file=config)
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print("\t},", file=config)
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print("", file=config)
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if (high_mem_hpa_len[i] != 0) and (high_mem_hpa2_len[i] != 0):
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print("\t{\t/* high mem after 4GB*/", file=config)
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print("\t\t.baseaddr = {}UL,\t/* 4 GB */".format(
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hex(FOUR_GBYTE)), file=config)
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print("\t\t.length = {}UL,\t/* {}MB */".format(
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hex(high_mem_hpa_len[i]), high_mem_hpa_len[i] / 1024 / 1024), file=config)
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print("\t\t.type = E820_TYPE_RAM", file=config)
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print("\t},", file=config)
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print("", file=config)
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print("\t{\t/* HPA2 after high mem*/", file=config)
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print("\t\t.baseaddr = {}UL,\t/* {}GB */".format(
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hex(high_mem_hpa2_addr[i]), high_mem_hpa2_addr[i] / 1024 / 1024 / 1024), file=config)
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print("\t\t.length = {}UL,\t/* {}MB */".format(
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hex(high_mem_hpa2_len[i]), high_mem_hpa2_len[i] / 1024 / 1024), file=config)
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print("\t\t.type = E820_TYPE_RAM", file=config)
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print("\t},", file=config)
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print("", file=config)
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elif (high_mem_hpa_len[i] != 0):
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print("\t{\t/* high mem after 4GB*/", file=config)
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print("\t\t.baseaddr = {}UL,\t/* 4 GB */".format(
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hex(FOUR_GBYTE)), file=config)
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print("\t\t.length = {}UL,\t/* {}MB */".format(
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hex(high_mem_hpa_len[i]), high_mem_hpa_len[i] / 1024 / 1024), file=config)
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print("\t\t.type = E820_TYPE_RAM", file=config)
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print("\t},", file=config)
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print("", file=config)
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elif(high_mem_hpa2_len[i] != 0):
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print("\t{\t/* HPA2 after 4GB*/", file=config)
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print("\t\t.baseaddr = {}UL,\t/* 4 GB */".format(
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hex(FOUR_GBYTE)), file=config)
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print("\t\t.length = {}UL,\t/* {}MB */".format(
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hex(high_mem_hpa2_len[i]), high_mem_hpa2_len[i] / 1024 / 1024), file=config)
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print("\t\t.type = E820_TYPE_RAM", file=config)
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print("\t},", file=config)
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print("", file=config)
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print("};", file=config)
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print("", file=config)
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print("/**", file=config)
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print(" * @pre vm != NULL", file=config)
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print("*/", file=config)
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print("void create_prelaunched_vm_e820(struct acrn_vm *vm)", file=config)
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print("{", file=config)
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for i in range(pre_vm_cnt):
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print("\tif (vm->vm_id == {}U)".format(hex(i)), file=config)
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print("\t{", file=config)
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print("\t\tvm->e820_entry_num = VM{}_VE820_ENTRIES_{};".format(i, board_name), file=config)
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print("\t\tvm->e820_entries = vm{}_ve820_entry;".format(i), file=config)
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print("\t}", file=config)
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print("", file=config)
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print("}", file=config)
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return err_dic
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def non_ve820_pre_launch(config):
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"""
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This is none pre launch vm setting
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:param config:
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:return:
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"""
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print("#include <e820.h>", file=config)
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print("#include <vm.h>", file=config)
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print("/**", file=config)
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print(" * @pre vm != NULL", file=config)
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print("*/", file=config)
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print("void create_prelaunched_vm_e820(struct acrn_vm *vm)", file=config)
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print("{", file=config)
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print("\tvm->e820_entry_num = 0;", file=config)
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print("\tvm->e820_entries = NULL;", file=config)
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print("}", file=config)
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def generate_file(config):
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"""Start to generate board.c
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:param config: it is a file pointer of board information for writing to
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"""
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err_dic = {}
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print("{0}".format(board_cfg_lib.HEADER_LICENSE), file=config)
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pre_vm_cnt = board_cfg_lib.get_pre_launch_cnt(board_cfg_lib.SCENARIO_INFO_FILE)
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# read mem size from scenario.xml
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hpa_size_list = board_cfg_lib.get_sub_leaf_tag(
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board_cfg_lib.SCENARIO_INFO_FILE, "memory", "size")
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ret = board_cfg_lib.is_hpa_size(hpa_size_list)
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if not ret:
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board_cfg_lib.print_red("Unknow type of host physical address size", err=True)
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err_dic['board config: generate ve820.c failed'] = "Unknow type of host physical address size"
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return err_dic
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# read HPA2 mem size from scenario.xml
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hpa2_size_list = board_cfg_lib.get_sub_leaf_tag(
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board_cfg_lib.SCENARIO_INFO_FILE, "memory", "size_hpa2")
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ret = board_cfg_lib.is_hpa_size(hpa2_size_list)
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if not ret:
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board_cfg_lib.print_red("Unknow type of second host physical address size", err=True)
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err_dic['board config: generate ve820.c failed'] = "Unknow type of second host physical address size"
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return err_dic
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# HPA size for both VMs should have valid length.
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for i in range(pre_vm_cnt):
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if hpa_size_list[i] == '0x0' or hpa_size_list[i] == '0X0':
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board_cfg_lib.print_red("HPA size should not be zero", err=True)
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err_dic['board config: generate ve820.c failed'] = "HPA size should not be zero"
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return err_dic
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if pre_vm_cnt != 0:
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err_dic = ve820_per_launch(config, hpa_size_list, hpa2_size_list)
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else:
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non_ve820_pre_launch(config)
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return err_dic
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