DM: wrap ASSERT/DEASSERT IRQ line with Set/Clear IRQ line

- remove ASSERT & DEASSET IRQ line IOCTLs
 - remove PULSE IRQ line IOCTLs, use set/clear
   IRQ line instead.
 - Use IC_SET_IRQLINE to set or clear IRQ line

Tracked-On: #861
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
This commit is contained in:
Yonghua Huang
2018-09-27 17:34:25 +08:00
committed by Xie, Nanlin
parent e12f88b8c7
commit b686b562f4
10 changed files with 32 additions and 131 deletions

View File

@@ -49,7 +49,7 @@ atkbdc_assert_kbd_intr(struct atkbdc_base *base)
{
if ((base->ram[0] & KBD_ENABLE_KBD_INT) != 0) {
base->kbd.irq_active = true;
vm_isa_pulse_irq(base->ctx, base->kbd.irq, base->kbd.irq);
vm_set_gsi_irq(base->ctx, base->kbd.irq, GSI_RAISING_PULSE);
}
}
@@ -58,7 +58,7 @@ atkbdc_assert_aux_intr(struct atkbdc_base *base)
{
if ((base->ram[0] & KBD_ENABLE_AUX_INT) != 0) {
base->aux.irq_active = true;
vm_isa_pulse_irq(base->ctx, base->aux.irq, base->aux.irq);
vm_set_gsi_irq(base->ctx, base->aux.irq, GSI_RAISING_PULSE);
}
}

View File

@@ -245,7 +245,7 @@ vpit_timer_handler(union sigval s)
c = &vpit->channel[arg->channel_num];
/* generate a rising edge on OUT */
vm_isa_pulse_irq(vpit->vm, PIT_ATPIC_IRQ, PIT_IOAPIC_IRQ);
vm_set_gsi_irq(vpit->vm, PIT_IOAPIC_IRQ, GSI_RAISING_PULSE);
/* CR -> CE if necessary */
pit_load_ce(c);

View File

@@ -716,13 +716,10 @@ vrtc_set_reg_c(struct vrtc *vrtc, uint8_t newval)
}
if (!oldirqf && newirqf) {
vm_isa_assert_irq(vrtc->vm, RTC_IRQ, RTC_IRQ);
/*vm_ioapic_assert_irq(vrtc->vm, RTC_IRQ);*/
vm_set_gsi_irq(vrtc->vm, RTC_IRQ, GSI_SET_HIGH);
RTC_DEBUG("RTC irq %d asserted\n", RTC_IRQ);
} else if (oldirqf && !newirqf) {
vm_isa_deassert_irq(vrtc->vm, RTC_IRQ, RTC_IRQ);
/*vm_ioapic_deassert_irq(vrtc->vm, RTC_IRQ);*/
vm_set_gsi_irq(vrtc->vm, RTC_IRQ, GSI_SET_LOW);
RTC_DEBUG("RTC irq %d deasserted\n", RTC_IRQ);
}
}