From b80c388b524c6711d7c003383fc73eb36bfcb5e6 Mon Sep 17 00:00:00 2001 From: Yifan Liu Date: Fri, 19 Mar 2021 14:15:07 +0800 Subject: [PATCH] hv: Hide HLAT to guest For platform with HLAT (Hypervisor-managed Linear Address Translation) capability, the hypervisor shall hide this feature to its guest. This patch adds MSR_IA32_VMX_PROCBASED_CTLS3 MSR to unsupported MSR list. The presence of this MSR is determined by 1-setting of bit 49 of MSR MSR_IA32_VMX_PROCBASED_CTLS. which is already in unsupported MSR list. [2] Related documentations: [1] Intel Architecture Instruction Set Extensions, version Feb 16, 2021, Ch 6.12 [2] Intel KeyLocker Specification, Sept 2020, Ch 7.2 Tracked-On: #5895 Signed-off-by: Yifan Liu Acked-by: Eddie Dong --- hypervisor/arch/x86/guest/vmsr.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/hypervisor/arch/x86/guest/vmsr.c b/hypervisor/arch/x86/guest/vmsr.c index 1c8a2a092..5d4293615 100644 --- a/hypervisor/arch/x86/guest/vmsr.c +++ b/hypervisor/arch/x86/guest/vmsr.c @@ -89,7 +89,7 @@ static const uint32_t mtrr_msrs[NUM_MTRR_MSRS] = { }; /* Following MSRs are intercepted, but it throws GPs for any guest accesses */ -#define NUM_UNSUPPORTED_MSRS 111U +#define NUM_UNSUPPORTED_MSRS 112U static const uint32_t unsupported_msrs[NUM_UNSUPPORTED_MSRS] = { /* Variable MTRRs are not supported */ MSR_IA32_MTRR_PHYSBASE_0, @@ -135,6 +135,7 @@ static const uint32_t unsupported_msrs[NUM_UNSUPPORTED_MSRS] = { MSR_IA32_VMX_TRUE_EXIT_CTLS, MSR_IA32_VMX_TRUE_ENTRY_CTLS, MSR_IA32_VMX_VMFUNC, + MSR_IA32_VMX_PROCBASED_CTLS3, /* MPX disabled: CPUID.07H.EBX[14] */ MSR_IA32_BNDCFGS,