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hv: virq: refine acrn_handle_pending_request() has more than one exit point

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The MISRA-C Standards suggests procedures to be single exit

Tracked-On: #861
Acked-by: Eddie Dong <eddie.dong@intel.com>
Signed-off-by: Tao Yuhong <yuhong.tao@intel.com>
This commit is contained in:
yuhong.tao@intel.com 2018-12-25 00:38:30 +00:00 committed by wenlingz
parent e692d4c721
commit b89b12280c
1 changed files with 76 additions and 87 deletions
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37
hypervisor/arch/x86/virq.c
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@ -394,31 +394,25 @@ int32_t acrn_handle_pending_request(struct acrn_vcpu *vcpu)
if (bitmap_test_and_clear_lock(ACRN_REQUEST_TRP_FAULT, if (bitmap_test_and_clear_lock(ACRN_REQUEST_TRP_FAULT,
pending_req_bits)) { pending_req_bits)) {
pr_fatal("Triple fault happen -> shutdown!"); pr_fatal("Triple fault happen -> shutdown!");
return -EFAULT; ret = -EFAULT;
} } else {
if (bitmap_test_and_clear_lock(ACRN_REQUEST_EPT_FLUSH, if (bitmap_test_and_clear_lock(ACRN_REQUEST_EPT_FLUSH, pending_req_bits)) {
pending_req_bits)) {
invept(vcpu); invept(vcpu);
} }
if (bitmap_test_and_clear_lock(ACRN_REQUEST_VPID_FLUSH, if (bitmap_test_and_clear_lock(ACRN_REQUEST_VPID_FLUSH, pending_req_bits)) {
pending_req_bits)) {
flush_vpid_single(arch->vpid); flush_vpid_single(arch->vpid);
} }
if (bitmap_test_and_clear_lock(ACRN_REQUEST_TMR_UPDATE, if (bitmap_test_and_clear_lock(ACRN_REQUEST_TMR_UPDATE, pending_req_bits)) { vioapic_update_tmr(vcpu);
pending_req_bits)) {
vioapic_update_tmr(vcpu);
} }
/* handling cancelled event injection when vcpu is switched out */ /* handling cancelled event injection when vcpu is switched out */
if (arch->inject_event_pending) { if (arch->inject_event_pending) {
if ((arch->inject_info.intr_info & if ((arch->inject_info.intr_info & (EXCEPTION_ERROR_CODE_VALID << 8U)) != 0U) {
(EXCEPTION_ERROR_CODE_VALID << 8U)) != 0U) {
error_code = arch->inject_info.error_code; error_code = arch->inject_info.error_code;
exec_vmwrite32(VMX_ENTRY_EXCEPTION_ERROR_CODE, exec_vmwrite32(VMX_ENTRY_EXCEPTION_ERROR_CODE, error_code);
error_code);
} }
intr_info = arch->inject_info.intr_info; intr_info = arch->inject_info.intr_info;
@ -472,21 +466,16 @@ int32_t acrn_handle_pending_request(struct acrn_vcpu *vcpu)
* an ExtInt or there is lapic interrupt and virtual interrupt * an ExtInt or there is lapic interrupt and virtual interrupt
* deliver is disabled. * deliver is disabled.
*/ */
if (arch->irq_window_enabled == 1U) { if (arch->irq_window_enabled != 1U) {
return ret; if (bitmap_test(ACRN_REQUEST_EXTINT, pending_req_bits) ||
} (!is_apicv_intr_delivery_supported() && vcpu_pending_request(vcpu))) {
if (!bitmap_test(ACRN_REQUEST_EXTINT,
pending_req_bits) &&
(is_apicv_intr_delivery_supported() ||
!vcpu_pending_request(vcpu))) {
return ret;
}
tmp = exec_vmread32(VMX_PROC_VM_EXEC_CONTROLS); tmp = exec_vmread32(VMX_PROC_VM_EXEC_CONTROLS);
tmp |= VMX_PROCBASED_CTLS_IRQ_WIN; tmp |= VMX_PROCBASED_CTLS_IRQ_WIN;
exec_vmwrite32(VMX_PROC_VM_EXEC_CONTROLS, tmp); exec_vmwrite32(VMX_PROC_VM_EXEC_CONTROLS, tmp);
arch->irq_window_enabled = 1U; arch->irq_window_enabled = 1U;
}
}
}
return ret; return ret;
} }