github/acrn-hypervisor
1
0
Fork 0
mirror of https://github.com/projectacrn/acrn-hypervisor.git synced 2025-09-08 12:19:06 +00:00
Code Issues Projects Releases Wiki Activity

hv: add struct acrn_vcpu_regs

Browse Source 
Add struct acrn_vcpu_regs and make struct boot_ctx based on
struct acrn_vcpu_regs.

vm0_boot_context is also changed from struct boot_ctx to struct
acrn_vcpu_regs.

Tracked-On: #1231
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
This commit is contained in:
Yin Fengwei
2018-09-28 14:36:53 +08:00
committed by lijinxia
parent 843f7721f0
commit ba1aa40707
5 changed files with 98 additions and 80 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
hypervisor/arch/x86/cpu_save_boot_ctx.S
View File

@@ -78,6 +78,6 @@ cpu_primary_save_64:
.align 8
.global vm0_boot_context
vm0_boot_context:
.rept 9
.quad 0x0000000000000000
.rept SIZE_OF_BOOT_CTX
.byte 0x00
.endr

4
hypervisor/arch/x86/guest/vcpu.c
View File

@@ -489,8 +489,8 @@ int prepare_vcpu(struct vm *vm, uint16_t pcpu_id)
vcpu->arch_vcpu.cpu_mode = CPU_MODE_PROTECTED;
#else
if (is_vm0(vcpu->vm)) {
struct boot_ctx *vm0_init_ctx =
(struct boot_ctx *)(&vm0_boot_context);
struct acrn_vcpu_regs *vm0_init_ctx =
(struct acrn_vcpu_regs *)(&vm0_boot_context);
/* VM0 bsp start mode is decided by the boot context
* setup by bootloader / bios */
if ((vm0_init_ctx->ia32_efer & MSR_IA32_EFER_LMA_BIT) &&

32
hypervisor/arch/x86/static_checks.c
View File

@@ -13,22 +13,22 @@ typedef int CAT_(CTA_DummyType,__LINE__)[(expr) ? 1 : -1]
/* Build time sanity checks to make sure hard-coded offset
* is matching the actual offset!
*/
CTASSERT(BOOT_CTX_CR0_OFFSET == offsetof(struct boot_ctx, cr0));
CTASSERT(BOOT_CTX_CR3_OFFSET == offsetof(struct boot_ctx, cr3));
CTASSERT(BOOT_CTX_CR4_OFFSET == offsetof(struct boot_ctx, cr4));
CTASSERT(BOOT_CTX_IDT_OFFSET == offsetof(struct boot_ctx, idt));
CTASSERT(BOOT_CTX_GDT_OFFSET == offsetof(struct boot_ctx, gdt));
CTASSERT(BOOT_CTX_LDT_SEL_OFFSET == offsetof(struct boot_ctx, ldt_sel));
CTASSERT(BOOT_CTX_TR_SEL_OFFSET == offsetof(struct boot_ctx, tr_sel));
CTASSERT(BOOT_CTX_CS_SEL_OFFSET == offsetof(struct boot_ctx, cs_sel));
CTASSERT(BOOT_CTX_SS_SEL_OFFSET == offsetof(struct boot_ctx, ss_sel));
CTASSERT(BOOT_CTX_DS_SEL_OFFSET == offsetof(struct boot_ctx, ds_sel));
CTASSERT(BOOT_CTX_ES_SEL_OFFSET == offsetof(struct boot_ctx, es_sel));
CTASSERT(BOOT_CTX_FS_SEL_OFFSET == offsetof(struct boot_ctx, fs_sel));
CTASSERT(BOOT_CTX_GS_SEL_OFFSET == offsetof(struct boot_ctx, gs_sel));
CTASSERT(BOOT_CTX_CS_AR_OFFSET == offsetof(struct boot_ctx, cs_ar));
CTASSERT(BOOT_CTX_EFER_LOW_OFFSET == offsetof(struct boot_ctx, ia32_efer));
CTASSERT(BOOT_CTX_EFER_HIGH_OFFSET == offsetof(struct boot_ctx, ia32_efer) + 4);
CTASSERT(BOOT_CTX_CR0_OFFSET == offsetof(struct acrn_vcpu_regs, cr0));
CTASSERT(BOOT_CTX_CR3_OFFSET == offsetof(struct acrn_vcpu_regs, cr3));
CTASSERT(BOOT_CTX_CR4_OFFSET == offsetof(struct acrn_vcpu_regs, cr4));
CTASSERT(BOOT_CTX_IDT_OFFSET == offsetof(struct acrn_vcpu_regs, idt));
CTASSERT(BOOT_CTX_GDT_OFFSET == offsetof(struct acrn_vcpu_regs, gdt));
CTASSERT(BOOT_CTX_LDT_SEL_OFFSET == offsetof(struct acrn_vcpu_regs, ldt_sel));
CTASSERT(BOOT_CTX_TR_SEL_OFFSET == offsetof(struct acrn_vcpu_regs, tr_sel));
CTASSERT(BOOT_CTX_CS_SEL_OFFSET == offsetof(struct acrn_vcpu_regs, cs_sel));
CTASSERT(BOOT_CTX_SS_SEL_OFFSET == offsetof(struct acrn_vcpu_regs, ss_sel));
CTASSERT(BOOT_CTX_DS_SEL_OFFSET == offsetof(struct acrn_vcpu_regs, ds_sel));
CTASSERT(BOOT_CTX_ES_SEL_OFFSET == offsetof(struct acrn_vcpu_regs, es_sel));
CTASSERT(BOOT_CTX_FS_SEL_OFFSET == offsetof(struct acrn_vcpu_regs, fs_sel));
CTASSERT(BOOT_CTX_GS_SEL_OFFSET == offsetof(struct acrn_vcpu_regs, gs_sel));
CTASSERT(BOOT_CTX_CS_AR_OFFSET == offsetof(struct acrn_vcpu_regs, cs_ar));
CTASSERT(BOOT_CTX_EFER_LOW_OFFSET == offsetof(struct acrn_vcpu_regs, ia32_efer));
CTASSERT(BOOT_CTX_EFER_HIGH_OFFSET == offsetof(struct acrn_vcpu_regs, ia32_efer) + 4);
CTASSERT(CPU_CONTEXT_OFFSET_RAX == offsetof(struct acrn_gp_regs, rax));
CTASSERT(CPU_CONTEXT_OFFSET_RBX == offsetof(struct acrn_gp_regs, rbx));

10
hypervisor/arch/x86/vmx.c
View File

@@ -563,7 +563,8 @@ static void init_guest_context_vm0_bsp(struct vcpu *vcpu)
{
struct ext_context *ectx =
&vcpu->arch_vcpu.contexts[vcpu->arch_vcpu.cur_context].ext_ctx;
struct boot_ctx * init_ctx = (struct boot_ctx *)(&vm0_boot_context);
struct acrn_vcpu_regs* init_ctx =
(struct acrn_vcpu_regs*)(&vm0_boot_context);
uint16_t *sel = &(init_ctx->cs_sel);
struct segment_sel *seg;
@@ -588,9 +589,9 @@ static void init_guest_context_vm0_bsp(struct vcpu *vcpu)
ectx->ldtr.selector = init_ctx->ldt_sel;
ectx->tr.selector = init_ctx->tr_sel;
#ifdef CONFIG_EFI_STUB
vcpu_set_rsp(vcpu, efi_ctx->gprs.rsp);
vcpu_set_rsp(vcpu, efi_ctx->vcpu_regs.gprs.rsp);
/* clear flags for CF/PF/AF/ZF/SF/OF */
vcpu_set_rflags(vcpu, efi_ctx->rflags & ~(0x8d5UL));
vcpu_set_rflags(vcpu, efi_ctx->vcpu_regs.rflags & ~(0x8d5UL));
#endif
}
@@ -663,7 +664,8 @@ static void init_guest_state(struct vcpu *vcpu)
{
struct cpu_context *ctx =
&vcpu->arch_vcpu.contexts[vcpu->arch_vcpu.cur_context];
struct boot_ctx * init_ctx = (struct boot_ctx *)(&vm0_boot_context);
struct acrn_vcpu_regs* init_ctx =
(struct acrn_vcpu_regs*)(&vm0_boot_context);
enum vm_cpu_mode vcpu_mode = get_vcpu_mode(vcpu);
vcpu_set_rflags(vcpu, 0x2UL); /* Bit 1 is a active high reserved bit */