HV: re-use split-lock emulation code for uc-lock

Split-lock emulation can be re-used for uc-lock. In emulate_splitlock(),
it only work if this vmexit is for #AC trap and guest do not handle
split-lock and HV enable #AC for splitlock.
Add another condition to let emulate_splitlock() also work for #GP trap
and guest do not handle uc-lock and HV enable #GP for uc-lock.

Tracked-On: #6299
Signed-off-by: Tao Yuhong <yuhong.tao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
This commit is contained in:
Tao Yuhong
2021-07-12 09:15:23 -04:00
committed by wenlingz
parent 553d59644b
commit bbd7b7091b
4 changed files with 46 additions and 12 deletions

View File

@@ -54,9 +54,15 @@ bool pcpu_has_vmx_ept_vpid_cap(uint64_t bit_mask);
bool is_apl_platform(void);
bool has_core_cap(uint32_t bit_mask);
bool is_ac_enabled(void);
bool is_gp_enabled(void);
void init_pcpu_capabilities(void);
void init_pcpu_model_name(void);
int32_t detect_hardware_support(void);
struct cpuinfo_x86 *get_pcpu_info(void);
/* The bits of MSR IA32_CORE_CAPABILITIES */
#define CORE_CAP_SPLIT_LOCK (1U << 5U) /* support #AC for Split-locked Access */
#define CORE_CAP_UC_LOCK (1U << 4U) /* support #GP for non-guaranteed-atomic-locked access at Non-WB memory */
#endif /* CPUINFO_H */

View File

@@ -595,6 +595,10 @@
/* 5 high-order bits in every field are reserved */
#define PAT_FIELD_RSV_BITS (0xF8UL)
/* MSR_TEST_CTL bits */
#define MSR_TEST_CTL_GP_UCLOCK (1U << 28U)
#define MSR_TEST_CTL_AC_SPLITLOCK (1U << 29U)
#define MSR_TEST_CTL_DISABLE_LOCK_ASSERTION (1U << 31U)
#ifndef ASSEMBLER
static inline bool is_pat_mem_type_invalid(uint64_t x)