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dm: virtio: support virtio 1.0 PCI configuration access capability

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The VIRTIO_PCI_CAP_PCI_CFG capability creates an alternative access
method to the common configuration, notification, ISR and device-
specific configuration regions.

To access a device region, the driver writes into the capability
structure (ie. within the PCI configuration space) as follows:

- The driver sets the BAR to access by writing to cap.bar
- The driver sets the size of the access by writing 1, 2 or 4 to
  cap.length
- The driver sets the offset within the BAR by writing to cap.offset

At that point, pci_cfg_data will provide a window of size cap.length
into the given cap.bar at offset cap.offset.

Signed-off-by: Jian Jun Chen <jian.jun.chen@intel.com>
Reviewed-by: Hao Li <hao.l.li@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Acked-by: Kevin Tian <kevin.tian@intel.com>
This commit is contained in:
Jian Jun Chen
2018-05-18 13:33:04 +08:00
committed by lijinxia
parent b25a30f271
commit c001911e19
2 changed files with 160 additions and 0 deletions
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39
devicemodel/include/virtio.h
View File

@@ -518,6 +518,7 @@ struct virtio_base {
uint8_t config_generation; /**< configuration generation */
uint32_t device_feature_select; /**< current selected device feature */
uint32_t driver_feature_select; /**< current selected guest feature */
int cfg_coff; /**< PCI cfg access capability offset */
};
#define VIRTIO_BASE_LOCK(vb) \
@@ -873,6 +874,44 @@ void virtio_dev_error(struct virtio_base *base);
*/
int virtio_set_modern_bar(struct virtio_base *base, bool use_notify_pio);
/**
* @brief Handle PCI configuration space reads.
*
* Handle virtio PCI configuration space reads. Only the specific registers
* that need speical operation are handled in this callback. For others just
* fallback to pci core. This interface is only valid for virtio modern.
*
* @param ctx Pointer to struct vmctx representing VM context.
* @param vcpu VCPU ID.
* @param dev Pointer to struct pci_vdev which emulates a PCI device.
* @param coff Register offset in bytes within PCI configuration space.
* @param bytes Access range in bytes.
* @param rv The value returned as read.
*
* @return 0 on handled and non-zero on non-handled.
*/
int virtio_pci_modern_cfgread(struct vmctx *ctx, int vcpu, struct pci_vdev *dev,
int coff, int bytes, uint32_t *rv);
/**
* @brief Handle PCI configuration space writes.
*
* Handle virtio PCI configuration space writes. Only the specific registers
* that need speical operation are handled in this callback. For others just
* fallback to pci core. This interface is only valid for virtio modern.
*
* @param ctx Pointer to struct vmctx representing VM context.
* @param vcpu VCPU ID.
* @param dev Pointer to struct pci_vdev which emulates a PCI device.
* @param coff Register offset in bytes within PCI configuration space.
* @param bytes Access range in bytes.
* @param value The value to write.
*
* @return 0 on handled and non-zero on non-handled.
*/
int virtio_pci_modern_cfgwrite(struct vmctx *ctx, int vcpu,
struct pci_vdev *dev, int coff, int bytes,
uint32_t val);
/**
* @}
*/