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acrn-config: keep align with vcpu_affinity for vm config

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The pcpu sharing for vm already enabled in master branch, acrn-config
tool for generating scenario config souce file should keep align with master branch.

1. Add 'vcpu_affinity' tag and its vaule in config xml.
2. Parse the 'vcpu_affinity' tag of value from config xml for generating vcpu_affinity.

v1-v2:
    1). apl-up2-n3350 has two PCPUs, set appropriate value for vcpu_affinity.

Tracked-On: #3798
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
This commit is contained in:
Wei Liu 2019-10-11 13:58:17 +08:00 committed by ACRN System Integration
parent db909edda5
commit c442f3f4d1
31 changed files with 261 additions and 57 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

10
misc/acrn-config/library/scenario_cfg_lib.py
View File

@ -114,7 +114,7 @@ def get_processor_info(board_info):
processor_info = get_info(board_info, "<CPU_PROCESSOR_INFO>", "</CPU_PROCESSOR_INFO>")
if not processor_info:
key = "vm:id=0,pcpu_ids"
key = "vm:id=0,vcpu_affinity"
ERR_LIST[key] = "CPU core is not exists"
return processor_list
@ -637,14 +637,14 @@ def cpus_assignment(cpus_per_vm, index):
for i in range(len(cpus_per_vm[index])):
if i == 0:
if len(cpus_per_vm[index]) == 1:
cpu_str = "(PLUG_CPU({0}))".format(cpus_per_vm[index][0])
cpu_str = "{{AFFINITY_CPU({0}U)}}".format(cpus_per_vm[index][0])
else:
cpu_str = "(PLUG_CPU({0})".format(cpus_per_vm[index][0])
cpu_str = "{{AFFINITY_CPU({0}U)".format(cpus_per_vm[index][0])
else:
if i == len(cpus_per_vm[index]) - 1:
cpu_str = cpu_str + " | PLUG_CPU({0}))".format(cpus_per_vm[index][i])
cpu_str = cpu_str + " , AFFINITY_CPU({0}U)}}".format(cpus_per_vm[index][i])
else:
cpu_str = cpu_str + " | PLUG_CPU({0})".format(cpus_per_vm[index][i])
cpu_str = cpu_str + " , AFFINITY_CPU({0}U)".format(cpus_per_vm[index][i])
vm_cpu_bmp['cpu_map'] = cpu_str
vm_cpu_bmp['cpu_num'] = len(cpus_per_vm[index])

2
misc/acrn-config/scenario_config/scenario_cfg_gen.py
View File

@ -34,7 +34,7 @@ def get_scenario_item_values(board_info, scenario_info):
# pre scenario
guest_flags = copy.deepcopy(scenario_cfg_lib.GUEST_FLAG)
guest_flags.remove('0UL')
scenario_item_values["vm,pcpu_ids"] = hw_info.get_processor_val()
scenario_item_values["vm,vcpu_affinity"] = hw_info.get_processor_val()
scenario_item_values["vm,guest_flags"] = guest_flags
scenario_item_values["vm,clos"] = hw_info.get_clos_val()
scenario_item_values["vm,os_config,kern_type"] = scenario_cfg_lib.KERN_TYPE_LIST

2
misc/acrn-config/scenario_config/scenario_item.py
View File

@ -280,7 +280,7 @@ class VmInfo:
self.guest_flag_idx = scenario_cfg_lib.get_sub_leaf_tag(
self.scenario_info, "guest_flags", "guest_flag")
self.cpus_per_vm = scenario_cfg_lib.get_leaf_tag_map(
self.scenario_info, "pcpu_ids", "pcpu_id")
self.scenario_info, "vcpu_affinity", "pcpu_id")
self.clos_set = scenario_cfg_lib.get_branch_tag_map(self.scenario_info, "clos")
self.epc_section.get_info()
self.mem_info.get_info()

34
misc/acrn-config/scenario_config/vm_configurations_c.py
View File

@ -155,6 +155,20 @@ def is_need_epc(epc_section, i, config):
print("\t\t},", file=config)
def vcpu_affinity_output(vm_info, i, config):
"""
Output the vcpu affinity
:param vminfo: the data structure have all the xml items values
:param i: the index of vm id
:param config: file pointor to store the information
"""
if vm_info.load_order[i] == "SOS_VM":
return
cpu_bits = vm_info.get_cpu_bitmap(i)
print("\t\t.vcpu_num = {}U,".format(cpu_bits['cpu_num']), file=config)
print("\t\t.vcpu_affinity = VM{}_CONFIG_VCPU_AFFINITY,".format(i), file=config)
def get_guest_flag(flag_index):
"""
This is get flag index list
@ -224,6 +238,7 @@ def gen_sdc_source(vm_info, config):
print("\t\t/* Allow SOS to reboot the host since " +
"there is supposed to be the highest severity guest */", file=config)
print("\t\t.guest_flags = {0},".format(sos_guest_flags), file=config)
vcpu_affinity_output(vm_info, 0, config)
if vm_info.clos_set[0] == None or not vm_info.clos_set[0].strip():
print("\t\t.clos = {0}U,".format(0), file=config)
else:
@ -249,6 +264,8 @@ def gen_sdc_source(vm_info, config):
# UUID
uuid_output(uuid_1, vm_info.uuid[1], config)
is_need_epc(vm_info.epc_section, 1, config)
print("\t\t.vcpu_num = CONFIG_MAX_PCPU_NUM - CONFIG_MAX_KATA_VM_NUM - 1U,", file=config)
print("\t\t.vcpu_affinity = VM{}_CONFIG_VCPU_AFFINITY,".format(1), file=config)
# VUART
err_dic = vuart_output(1, vm_info, config)
if err_dic:
@ -258,6 +275,7 @@ def gen_sdc_source(vm_info, config):
print("\t{", file=config)
print("\t\t.load_order = POST_LAUNCHED_VM,", file=config)
uuid_output(uuid_2, vm_info.uuid[2], config)
vcpu_affinity_output(vm_info, 2, config)
is_need_epc(vm_info.epc_section, 2, config)
print("\t\t.vuart[0] = {", file=config)
print("\t\t\t.type = VUART_LEGACY_PIO,", file=config)
@ -304,6 +322,7 @@ def gen_sdc2_source(vm_info, config):
print("\t\t/* Allow SOS to reboot the host since " +
"there is supposed to be the highest severity guest */", file=config)
print("\t\t.guest_flags = {0},".format(sos_guest_flags), file=config)
vcpu_affinity_output(vm_info, 0, config)
if vm_info.clos_set[0] == None or not vm_info.clos_set[0].strip():
print("\t\t.clos = {0}U,".format(0), file=config)
else:
@ -329,6 +348,7 @@ def gen_sdc2_source(vm_info, config):
print("\t\t.load_order = {0},".format(vm_info.load_order[1]), file=config)
# UUID
uuid_output(uuid_1, vm_info.uuid[1], config)
vcpu_affinity_output(vm_info, 1, config)
is_need_epc(vm_info.epc_section, 1, config)
# VUART
err_dic = vuart_output(1, vm_info, config)
@ -340,6 +360,7 @@ def gen_sdc2_source(vm_info, config):
print("\t\t.load_order = {0},".format(vm_info.load_order[1]), file=config)
# UUID
uuid_output(uuid_2, vm_info.uuid[2], config)
vcpu_affinity_output(vm_info, 2, config)
is_need_epc(vm_info.epc_section, 2, config)
# VUART
err_dic = vuart_output(1, vm_info, config)
@ -352,6 +373,7 @@ def gen_sdc2_source(vm_info, config):
print("\t\t.load_order = POST_LAUNCHED_VM,", file=config)
uuid_output(uuid_3, vm_info.uuid[3], config)
is_need_epc(vm_info.epc_section, 3, config)
vcpu_affinity_output(vm_info, 3, config)
print("\t\t.vuart[0] = {", file=config)
print("\t\t\t.type = VUART_LEGACY_PIO,", file=config)
print("\t\t\t.addr.port_base = INVALID_COM_BASE,", file=config)
@ -412,7 +434,7 @@ def gen_logical_partition_source(vm_info, config):
print('\t\t.name = "{0}",'.format(vm_info.name[i]), file=config)
# UUID
uuid_output(uuid, vm_info.uuid[i], config)
print("\t\t.pcpu_bitmap = VM{0}_CONFIG_PCPU_BITMAP,".format(i), file=config)
vcpu_affinity_output(vm_info, i, config)
# skip the vm0 for guest flag
# guest flags
@ -480,6 +502,10 @@ def gen_industry_source(vm_info, config):
return err_dic
print("\t\t")
print("\t\t.guest_flags = {0},".format(sos_guest_flags), file=config)
vcpu_affinity_output(vm_info, i, config)
if i == 0:
if vm_info.clos_set[i] == None or not vm_info.clos_set[i].strip():
print("\t\t.clos = {0}U,".format(0), file=config)
else:
@ -544,8 +570,10 @@ def gen_hybrid_source(vm_info, config):
if err_dic:
return err_dic
print("\t\t.guest_flags = {0},".format(sos_guest_flags), file=config)
if i == 0:
print("\t\t.pcpu_bitmap = VM0_CONFIG_PCPU_BITMAP,", file=config)
vcpu_affinity_output(vm_info, i, config)
if i != 2:
if vm_info.clos_set[i] == None or not vm_info.clos_set[i].strip():
print("\t\t.clos = {0}U,".format(0), file=config)
else:

57
misc/acrn-config/scenario_config/vm_configurations_h.py
View File

@ -21,7 +21,22 @@ def gen_common_header(config):
print("{0}".format(VM_HEADER_DEFINE), file=config)
def gen_sdc_header(config):
def cpu_affinity_output(vm_info, i, config):
"""
Output the macro vcpu affinity
:param vm_info: the data structure have all the xml items values
:param i: the index of vm id
:param config: file pointor to store the information
"""
if vm_info.load_order[i] == "SOS_VM":
return
cpu_bits = vm_info.get_cpu_bitmap(i)
print("#define VM{0}_CONFIG_VCPU_AFFINITY\t{1}".format(
i, cpu_bits['cpu_map']), file=config)
def gen_sdc_header(vm_info, config):
"""
Generate vm_configuration.h of sdc scenario
:param config: it is the pointer which file write to
@ -52,11 +67,21 @@ def gen_sdc_header(config):
print('\t\t\t\t\t"i915.enable_gvt=1 "\t\\', file=config)
print("\t\t\t\t\tSOS_BOOTARGS_DIFF", file=config)
print("", file=config)
print("#if CONFIG_MAX_KATA_VM_NUM > 0", file=config)
# POST LAUNCHED VM
print(" #define VM1_CONFIG_VCPU_AFFINITY\t{AFFINITY_CPU(1U), AFFINITY_CPU(2U)}", file=config)
# KATA VM
cpu_affinity_output(vm_info, 2, config)
print("#else", file=config)
for i in range(scenario_cfg_lib.VM_COUNT - 1):
cpu_affinity_output(vm_info, i, config)
print("#endif", file=config)
print("", file=config)
print("{0}".format(VM_END_DEFINE), file=config)
def gen_sdc2_header(config):
def gen_sdc2_header(vm_info, config):
"""
Generate vm_configuration.h of sdc2 scenario
:param config: it is the pointer which file write to
@ -87,6 +112,9 @@ def gen_sdc2_header(config):
print('\t\t\t\t\t"i915.enable_gvt=1 "\t\\', file=config)
print("\t\t\t\t\tSOS_BOOTARGS_DIFF", file=config)
print("", file=config)
for i in range(scenario_cfg_lib.VM_COUNT):
cpu_affinity_output(vm_info, i, config)
print("", file=config)
print("{0}".format(VM_END_DEFINE), file=config)
@ -101,7 +129,7 @@ def logic_max_vm_num(config):
print("#define CONFIG_MAX_VM_NUM\t{0}U".format(scenario_cfg_lib.VM_COUNT), file=config)
print("", file=config)
print("/* The VM CONFIGs like:", file=config)
print(" *\tVMX_CONFIG_PCPU_BITMAP", file=config)
print(" *\tVMX_CONFIG_VCPU_AFFINITY", file=config)
print(" *\tVMX_CONFIG_MEM_START_HPA", file=config)
print(" *\tVMX_CONFIG_MEM_SIZE", file=config)
print(" *\tVMX_CONFIG_OS_BOOTARG_ROOT", file=config)
@ -112,7 +140,7 @@ def logic_max_vm_num(config):
print("", file=config)
def gen_logic_header(vm_info, config):
def gen_logical_partition_header(vm_info, config):
"""
Generate vm_configuration.h of logical_partition scenario
:param config: it is the pointer which file write to
@ -133,8 +161,7 @@ def gen_logic_header(vm_info, config):
for i in range(scenario_cfg_lib.VM_COUNT):
cpu_bits = vm_info.get_cpu_bitmap(i)
print("#define VM{0}_CONFIG_PCPU_BITMAP\t\t\t{1}".format(
i, cpu_bits['cpu_map']), file=config)
cpu_affinity_output(vm_info, i, config)
print("#define VM{0}_CONFIG_MEM_START_HPA\t\t{1}UL".format(
i, vm_info.mem_info.mem_start_hpa[i]), file=config)
print("#define VM{0}_CONFIG_MEM_SIZE\t\t\t{1}UL".format(
@ -176,7 +203,7 @@ def gen_logic_header(vm_info, config):
print("{0}".format(VM_END_DEFINE), file=config)
def gen_industry_header(config):
def gen_industry_header(vm_info, config):
"""
Generate vm_configuration.h of industry scenario
:param config: it is the pointer which file write to
@ -207,6 +234,9 @@ def gen_industry_header(config):
print('\t\t\t\t\t"i915.enable_gvt=1 "\t\\', file=config)
print("\t\t\t\t\tSOS_BOOTARGS_DIFF", file=config)
print("", file=config)
for i in range(scenario_cfg_lib.VM_COUNT):
cpu_affinity_output(vm_info, i, config)
print("", file=config)
print("{0}".format(VM_END_DEFINE), file=config)
@ -225,12 +255,13 @@ def gen_hybrid_header(vm_info, config):
"(GUEST_FLAG_SECURE_WORLD_ENABLED | GUEST_FLAG_LAPIC_PASSTHROUGH | \\\n" +
"\t\t\t\t\t\tGUEST_FLAG_RT | GUEST_FLAG_IO_COMPLETION_POLLING)", file=config)
cpu_bits = vm_info.get_cpu_bitmap(0)
print("", file=config)
print("#define CONFIG_MAX_VM_NUM\t\t({0}U + CONFIG_MAX_KATA_VM_NUM)".format(
scenario_cfg_lib.VM_COUNT), file=config)
print("", file=config)
print("#define VM0_CONFIG_PCPU_BITMAP\t\t{0}".format(cpu_bits['cpu_map']), file=config)
for i in range(scenario_cfg_lib.VM_COUNT):
cpu_affinity_output(vm_info, i, config)
print("#define VM0_CONFIG_MEM_START_HPA\t{0}UL".format(
vm_info.mem_info.mem_start_hpa[0]), file=config)
print("#define VM0_CONFIG_MEM_SIZE\t\t{0}UL".format(vm_info.mem_info.mem_size[0]), file=config)
@ -260,13 +291,13 @@ def generate_file(scenario, vm_info, config):
:param config: it is a file pointer of board information for writing to
"""
if scenario == 'sdc':
gen_sdc_header(config)
gen_sdc_header(vm_info, config)
elif scenario == 'sdc2':
gen_sdc2_header(config)
gen_sdc2_header(vm_info, config)
elif scenario == 'logical_partition':
gen_logic_header(vm_info, config)
gen_logical_partition_header(vm_info, config)
elif scenario == 'industry':
gen_industry_header(config)
gen_industry_header(vm_info, config)
else:
# scenario is 'hybrid'
gen_hybrid_header(vm_info, config)

7
misc/acrn-config/xmls/config-xmls/apl-mrb/hybrid.xml
View File

@ -6,9 +6,9 @@
<guest_flags desc="Select all applicable flags for the VM" multiselect="true">
<guest_flag>GUEST_FLAG_HIGHEST_SEVERITY</guest_flag>
</guest_flags>
<pcpu_ids desc="Assign physical CPU IDs to the VM" multiselect="true">
<vcpu_affinity desc="vCPU affinity map. Each vCPU will pin to the selected pCPU ID. Please make sure each vCPU pin to different pCPU.">
<pcpu_id>3</pcpu_id>
</pcpu_ids>
</vcpu_affinity>
<clos desc="Class of Service for Cache Allocation Technology. Please refer SDM 17.19.2 for details and use with caution.">0</clos>
<epc_section desc="epc section">
<base desc="SGX EPC section base, must be page aligned">0</base>
@ -90,6 +90,9 @@
<guest_flags desc="Select all applicable flags for the VM" multiselect="true">
<guest_flag>0</guest_flag>
</guest_flags>
<vcpu_affinity desc="vCPU affinity map. Each vCPU will pin to the selected pCPU ID. Please make sure each vCPU pin to different pCPU.">
<pcpu_id>2</pcpu_id>
</vcpu_affinity>
<clos desc="Class of Service for Cache Allocation Technology. Please refer SDM 17.19.2 for details and use with caution.">0</clos>
<epc_section desc="epc section">
<base desc="SGX EPC section base, must be page aligned">0</base>

9
misc/acrn-config/xmls/config-xmls/apl-mrb/industry.xml
View File

@ -48,6 +48,9 @@
<guest_flags desc="Select all applicable flags for the VM" multiselect="true">
<guest_flag>0</guest_flag>
</guest_flags>
<vcpu_affinity desc="vCPU affinity map. Each vCPU will pin to the selected pCPU ID. Please make sure each vCPU pin to different pCPU.">
<pcpu_id>1</pcpu_id>
</vcpu_affinity>
<clos desc="Class of Service for Cache Allocation Technology. Please refer SDM 17.19.2 for details and use with caution.">0</clos>
<epc_section desc="epc section">
<base desc="SGX EPC section base, must be page aligned">0</base>
@ -72,6 +75,9 @@
<guest_flags desc="Select all applicable flags for the VM" multiselect="true">
<guest_flag>GUEST_FLAG_HIGHEST_SEVERITY</guest_flag>
</guest_flags>
<vcpu_affinity desc="vCPU affinity map. Each vCPU will pin to the selected pCPU ID. Please make sure each vCPU pin to different pCPU.">
<pcpu_id>2</pcpu_id>
</vcpu_affinity>
<clos desc="Class of Service for Cache Allocation Technology. Please refer SDM 17.19.2 for details and use with caution.">0</clos>
<epc_section desc="epc section">
<base desc="SGX EPC section base, must be page aligned">0</base>
@ -96,6 +102,9 @@
<guest_flags desc="Select all applicable flags for the VM" multiselect="true">
<guest_flag>0</guest_flag>
</guest_flags>
<vcpu_affinity desc="vCPU affinity map. Each vCPU will pin to the selected pCPU ID. Please make sure each vCPU pin to different pCPU.">
<pcpu_id>3</pcpu_id>
</vcpu_affinity>
<clos desc="Class of Service for Cache Allocation Technology. Please refer SDM 17.19.2 for details and use with caution.">0</clos>
<epc_section desc="epc section">
<base desc="SGX EPC section base, must be page aligned">0</base>

8
misc/acrn-config/xmls/config-xmls/apl-mrb/logical_partition.xml
View File

@ -6,10 +6,10 @@
<guest_flags desc="Select all applicable flags for the VM" multiselect="true">
<guest_flag></guest_flag>
</guest_flags>
<pcpu_ids desc="Assign physical CPU IDs to the VM" multiselect="true">
<vcpu_affinity desc="vCPU affinity map. Each vCPU will pin to the selected pCPU ID. Please make sure each vCPU pin to different pCPU.">
<pcpu_id>0</pcpu_id>
<pcpu_id>2</pcpu_id>
</pcpu_ids>
</vcpu_affinity>
<clos desc="Class of Service for Cache Allocation Technology. Please refer SDM 17.19.2 for details and use with caution.">0</clos>
<epc_section desc="epc section">
<base desc="SGX EPC section base, must be page aligned">0</base>
@ -52,10 +52,10 @@
<guest_flag>GUEST_FLAG_RT</guest_flag>
<guest_flag>GUEST_FLAG_LAPIC_PASSTHROUGH</guest_flag>
</guest_flags>
<pcpu_ids desc="Assign physical CPU IDs to the VM" multiselect="true">
<vcpu_affinity desc="vCPU affinity map. Each vCPU will pin to the selected pCPU ID. Please make sure each vCPU pin to different pCPU.">
<pcpu_id>1</pcpu_id>
<pcpu_id>3</pcpu_id>
</pcpu_ids>
</vcpu_affinity>
<clos desc="Class of Service for Cache Allocation Technology. Please refer SDM 17.19.2 for details and use with caution.">0</clos>
<epc_section desc="epc section">
<base desc="SGX EPC section base, must be page aligned">0</base>

8
misc/acrn-config/xmls/config-xmls/apl-mrb/sdc.xml
View File

@ -48,6 +48,11 @@
<guest_flags desc="Select all applicable flags for the VM" multiselect="true">
<guest_flag>0</guest_flag>
</guest_flags>
<vcpu_affinity desc="vCPU affinity map. Each vCPU will pin to the selected pCPU ID. Please make sure each vCPU pin to different pCPU.">
<pcpu_id>1</pcpu_id>
<pcpu_id>2</pcpu_id>
<pcpu_id>3</pcpu_id>
</vcpu_affinity>
<clos desc="Class of Service for Cache Allocation Technology. Please refer SDM 17.19.2 for details and use with caution.">0</clos>
<epc_section desc="epc section">
<base desc="SGX EPC section base, must be page aligned">0</base>
@ -70,6 +75,9 @@
<load_order desc="Specify the VM by its load order: PRE_LAUNCHED_VM, SOS_VM or POST_LAUNCHED_VM.">POST_LAUNCHED_VM</load_order>
<uuid configurable="0" desc="vm uuid">a7ada506-1ab0-4b6b-a0da-e513ca9b8c2f</uuid>
<clos desc="Class of Service for Cache Allocation Technology. Please refer SDM 17.19.2 for details and use with caution.">0</clos>
<vcpu_affinity desc="vCPU affinity map. Each vCPU will pin to the selected pCPU ID. Please make sure each vCPU pin to different pCPU.">
<pcpu_id>3</pcpu_id>
</vcpu_affinity>
<epc_section desc="epc section">
<base desc="SGX EPC section base, must be page aligned">0</base>
<size desc="SGX EPC section size in Bytes, must be page aligned">0</size>

9
misc/acrn-config/xmls/config-xmls/apl-mrb/sdc2.xml
View File

@ -48,6 +48,9 @@
<guest_flags desc="Select all applicable flags for the VM" multiselect="true">
<guest_flag>0</guest_flag>
</guest_flags>
<vcpu_affinity desc="vCPU affinity map. Each vCPU will pin to the selected pCPU ID. Please make sure each vCPU pin to different pCPU.">
<pcpu_id>1</pcpu_id>
</vcpu_affinity>
<clos desc="Class of Service for Cache Allocation Technology. Please refer SDM 17.19.2 for details and use with caution.">0</clos>
<epc_section desc="epc section">
<base desc="SGX EPC section base, must be page aligned">0</base>
@ -72,6 +75,9 @@
<guest_flags desc="Select all applicable flags for the VM" multiselect="true">
<guest_flag>0</guest_flag>
</guest_flags>
<vcpu_affinity desc="vCPU affinity map. Each vCPU will pin to the selected pCPU ID. Please make sure each vCPU pin to different pCPU.">
<pcpu_id>2</pcpu_id>
</vcpu_affinity>
<clos desc="Class of Service for Cache Allocation Technology. Please refer SDM 17.19.2 for details and use with caution.">0</clos>
<epc_section desc="epc section">
<base desc="SGX EPC section base, must be page aligned">0</base>
@ -96,6 +102,9 @@
<guest_flags desc="Select all applicable flags for the VM" multiselect="true">
<guest_flag>0</guest_flag>
</guest_flags>
<vcpu_affinity desc="vCPU affinity map. Each vCPU will pin to the selected pCPU ID. Please make sure each vCPU pin to different pCPU.">
<pcpu_id>3</pcpu_id>
</vcpu_affinity>
<clos desc="Class of Service for Cache Allocation Technology. Please refer SDM 17.19.2 for details and use with caution.">0</clos>
<epc_section desc="epc section">
<base desc="SGX EPC section base, must be page aligned">0</base>

8
misc/acrn-config/xmls/config-xmls/apl-up2-n3350/logical_partition.xml
View File

@ -7,9 +7,9 @@
<guest_flag></guest_flag>
<guest_flag></guest_flag>
</guest_flags>
<pcpu_ids desc="Assign physical CPU IDs to the VM" multiselect="true">
<vcpu_affinity desc="vCPU affinity map. Each vCPU will pin to the selected pCPU ID. Please make sure each vCPU pin to different pCPU.">
<pcpu_id>0</pcpu_id>
</pcpu_ids>
</vcpu_affinity>
<clos desc="Class of Service for Cache Allocation Technology. Please refer SDM 17.19.2 for details and use with caution.">0</clos>
<epc_section desc="epc section">
<base desc="SGX EPC section base, must be page aligned">0</base>
@ -52,9 +52,9 @@
<guest_flag>GUEST_FLAG_RT</guest_flag>
<guest_flag>GUEST_FLAG_LAPIC_PASSTHROUGH</guest_flag>
</guest_flags>
<pcpu_ids desc="Assign physical CPU IDs to the VM" multiselect="true">
<vcpu_affinity desc="vCPU affinity map. Each vCPU will pin to the selected pCPU ID. Please make sure each vCPU pin to different pCPU.">
<pcpu_id>1</pcpu_id>
</pcpu_ids>
</vcpu_affinity>
<clos desc="Class of Service for Cache Allocation Technology. Please refer SDM 17.19.2 for details and use with caution.">0</clos>
<epc_section desc="epc section">
<base desc="SGX EPC section base, must be page aligned">0</base>

7
misc/acrn-config/xmls/config-xmls/apl-up2/hybrid.xml
View File

@ -6,9 +6,9 @@
<guest_flags desc="Select all applicable flags for the VM" multiselect="true">
<guest_flag>GUEST_FLAG_HIGHEST_SEVERITY</guest_flag>
</guest_flags>
<pcpu_ids desc="Assign physical CPU IDs to the VM" multiselect="true">
<vcpu_affinity desc="vCPU affinity map. Each vCPU will pin to the selected pCPU ID. Please make sure each vCPU pin to different pCPU.">
<pcpu_id>3</pcpu_id>
</pcpu_ids>
</vcpu_affinity>
<clos desc="Class of Service for Cache Allocation Technology. Please refer SDM 17.19.2 for details and use with caution.">0</clos>
<epc_section desc="epc section">
<base desc="SGX EPC section base, must be page aligned">0</base>
@ -90,6 +90,9 @@
<guest_flags desc="Select all applicable flags for the VM" multiselect="true">
<guest_flag>0</guest_flag>
</guest_flags>
<vcpu_affinity desc="vCPU affinity map. Each vCPU will pin to the selected pCPU ID. Please make sure each vCPU pin to different pCPU.">
<pcpu_id>2</pcpu_id>
</vcpu_affinity>
<clos desc="Class of Service for Cache Allocation Technology. Please refer SDM 17.19.2 for details and use with caution.">0</clos>
<epc_section desc="epc section">
<base desc="SGX EPC section base, must be page aligned">0</base>

9
misc/acrn-config/xmls/config-xmls/apl-up2/industry.xml
View File

@ -48,6 +48,9 @@
<guest_flags desc="Select all applicable flags for the VM" multiselect="true">
<guest_flag>0</guest_flag>
</guest_flags>
<vcpu_affinity desc="vCPU affinity map. Each vCPU will pin to the selected pCPU ID. Please make sure each vCPU pin to different pCPU.">
<pcpu_id>1</pcpu_id>
</vcpu_affinity>
<clos desc="Class of Service for Cache Allocation Technology. Please refer SDM 17.19.2 for details and use with caution.">0</clos>
<epc_section desc="epc section">
<base desc="SGX EPC section base, must be page aligned">0</base>
@ -72,6 +75,9 @@
<guest_flags desc="Select all applicable flags for the VM" multiselect="true">
<guest_flag>GUEST_FLAG_HIGHEST_SEVERITY</guest_flag>
</guest_flags>
<vcpu_affinity desc="vCPU affinity map. Each vCPU will pin to the selected pCPU ID. Please make sure each vCPU pin to different pCPU.">
<pcpu_id>2</pcpu_id>
</vcpu_affinity>
<clos desc="Class of Service for Cache Allocation Technology. Please refer SDM 17.19.2 for details and use with caution.">0</clos>
<epc_section desc="epc section">
<base desc="SGX EPC section base, must be page aligned">0</base>
@ -96,6 +102,9 @@
<guest_flags desc="Select all applicable flags for the VM" multiselect="true">
<guest_flag>0</guest_flag>
</guest_flags>
<vcpu_affinity desc="vCPU affinity map. Each vCPU will pin to the selected pCPU ID. Please make sure each vCPU pin to different pCPU.">
<pcpu_id>3</pcpu_id>
</vcpu_affinity>
<clos desc="Class of Service for Cache Allocation Technology. Please refer SDM 17.19.2 for details and use with caution.">0</clos>
<epc_section desc="epc section">
<base desc="SGX EPC section base, must be page aligned">0</base>

8
misc/acrn-config/xmls/config-xmls/apl-up2/logical_partition.xml
View File

@ -7,10 +7,10 @@
<guest_flag></guest_flag>
<guest_flag></guest_flag>
</guest_flags>
<pcpu_ids desc="Assign physical CPU IDs to the VM" multiselect="true">
<vcpu_affinity desc="vCPU affinity map. Each vCPU will pin to the selected pCPU ID. Please make sure each vCPU pin to different pCPU.">
<pcpu_id>0</pcpu_id>
<pcpu_id>2</pcpu_id>
</pcpu_ids>
</vcpu_affinity>
<clos desc="Class of Service for Cache Allocation Technology. Please refer SDM 17.19.2 for details and use with caution.">0</clos>
<epc_section desc="epc section">
<base desc="SGX EPC section base, must be page aligned">0</base>
@ -53,10 +53,10 @@
<guest_flag>GUEST_FLAG_RT</guest_flag>
<guest_flag>GUEST_FLAG_LAPIC_PASSTHROUGH</guest_flag>
</guest_flags>
<pcpu_ids desc="Assign physical CPU IDs to the VM" multiselect="true">
<vcpu_affinity desc="vCPU affinity map. Each vCPU will pin to the selected pCPU ID. Please make sure each vCPU pin to different pCPU.">
<pcpu_id>1</pcpu_id>
<pcpu_id>3</pcpu_id>
</pcpu_ids>
</vcpu_affinity>
<clos desc="Class of Service for Cache Allocation Technology. Please refer SDM 17.19.2 for details and use with caution.">0</clos>
<epc_section desc="epc section">
<base desc="SGX EPC section base, must be page aligned">0</base>

8
misc/acrn-config/xmls/config-xmls/apl-up2/sdc.xml
View File

@ -48,6 +48,11 @@
<guest_flags desc="Select all applicable flags for the VM" multiselect="true">
<guest_flag>0</guest_flag>
</guest_flags>
<vcpu_affinity desc="vCPU affinity map. Each vCPU will pin to the selected pCPU ID. Please make sure each vCPU pin to different pCPU.">
<pcpu_id>1</pcpu_id>
<pcpu_id>2</pcpu_id>
<pcpu_id>3</pcpu_id>
</vcpu_affinity>
<clos desc="Class of Service for Cache Allocation Technology. Please refer SDM 17.19.2 for details and use with caution.">0</clos>
<epc_section desc="epc section">
<base desc="SGX EPC section base, must be page aligned">0</base>
@ -70,6 +75,9 @@
<load_order configurable="0" desc="Specify the VM by its load order: PRE_LAUNCHED_VM, SOS_VM or POST_LAUNCHED_VM.">POST_LAUNCHED_VM</load_order>
<uuid configurable="0" desc="vm uuid">a7ada506-1ab0-4b6b-a0da-e513ca9b8c2f</uuid>
<clos desc="Class of Service for Cache Allocation Technology. Please refer SDM 17.19.2 for details and use with caution.">0</clos>
<vcpu_affinity desc="vCPU affinity map. Each vCPU will pin to the selected pCPU ID. Please make sure each vCPU pin to different pCPU.">
<pcpu_id>3</pcpu_id>
</vcpu_affinity>
<epc_section desc="epc section">
<base desc="SGX EPC section base, must be page aligned">0</base>
<size desc="SGX EPC section size in Bytes, must be page aligned">0</size>

9
misc/acrn-config/xmls/config-xmls/apl-up2/sdc2.xml
View File

@ -48,6 +48,9 @@
<guest_flags desc="Select all applicable flags for the VM" multiselect="true">
<guest_flag>0</guest_flag>
</guest_flags>
<vcpu_affinity desc="vCPU affinity map. Each vCPU will pin to the selected pCPU ID. Please make sure each vCPU pin to different pCPU.">
<pcpu_id>1</pcpu_id>
</vcpu_affinity>
<clos desc="Class of Service for Cache Allocation Technology. Please refer SDM 17.19.2 for details and use with caution.">0</clos>
<epc_section desc="epc section">
<base desc="SGX EPC section base, must be page aligned">0</base>
@ -72,6 +75,9 @@
<guest_flags desc="Select all applicable flags for the VM" multiselect="true">
<guest_flag>0</guest_flag>
</guest_flags>
<vcpu_affinity desc="vCPU affinity map. Each vCPU will pin to the selected pCPU ID. Please make sure each vCPU pin to different pCPU.">
<pcpu_id>2</pcpu_id>
</vcpu_affinity>
<clos desc="Class of Service for Cache Allocation Technology. Please refer SDM 17.19.2 for details and use with caution.">0</clos>
<epc_section desc="epc section">
<base desc="SGX EPC section base, must be page aligned">0</base>
@ -96,6 +102,9 @@
<guest_flags desc="Select all applicable flags for the VM" multiselect="true">
<guest_flag>0</guest_flag>
</guest_flags>
<vcpu_affinity desc="vCPU affinity map. Each vCPU will pin to the selected pCPU ID. Please make sure each vCPU pin to different pCPU.">
<pcpu_id>3</pcpu_id>
</vcpu_affinity>
<clos desc="Class of Service for Cache Allocation Technology. Please refer SDM 17.19.2 for details and use with caution.">0</clos>
<epc_section desc="epc section">
<base desc="SGX EPC section base, must be page aligned">0</base>

7
misc/acrn-config/xmls/config-xmls/generic/hybrid.xml
View File

@ -6,9 +6,9 @@
<guest_flags desc="Select all applicable flags for the VM" multiselect="true">
<guest_flag>GUEST_FLAG_HIGHEST_SEVERITY</guest_flag>
</guest_flags>
<pcpu_ids desc="Assign physical CPU IDs to the VM" multiselect="true">
<vcpu_affinity desc="vCPU affinity map. Each vCPU will pin to the selected pCPU ID. Please make sure each vCPU pin to different pCPU.">
<pcpu_id>3</pcpu_id>
</pcpu_ids>
</vcpu_affinity>
<clos desc="Class of Service for Cache Allocation Technology. Please refer SDM 17.19.2 for details and use with caution.">0</clos>
<epc_section desc="epc section">
<base desc="SGX EPC section base, must be page aligned">0</base>
@ -88,6 +88,9 @@
<guest_flags desc="Select all applicable flags for the VM" multiselect="true">
<guest_flag>0</guest_flag>
</guest_flags>
<vcpu_affinity desc="vCPU affinity map. Each vCPU will pin to the selected pCPU ID. Please make sure each vCPU pin to different pCPU.">
<pcpu_id>2</pcpu_id>
</vcpu_affinity>
<clos desc="Class of Service for Cache Allocation Technology. Please refer SDM 17.19.2 for details and use with caution.">0</clos>
<epc_section desc="epc section">
<base desc="SGX EPC section base, must be page aligned">0</base>

9
misc/acrn-config/xmls/config-xmls/generic/industry.xml
View File

@ -46,6 +46,9 @@
<guest_flags desc="Select all applicable flags for the VM" multiselect="true">
<guest_flag>0</guest_flag>
</guest_flags>
<vcpu_affinity desc="vCPU affinity map. Each vCPU will pin to the selected pCPU ID. Please make sure each vCPU pin to different pCPU.">
<pcpu_id>1</pcpu_id>
</vcpu_affinity>
<clos desc="Class of Service for Cache Allocation Technology. Please refer SDM 17.19.2 for details and use with caution.">0</clos>
<epc_section desc="epc section">
<base desc="SGX EPC section base, must be page aligned">0</base>
@ -70,6 +73,9 @@
<guest_flags desc="Select all applicable flags for the VM" multiselect="true">
<guest_flag>GUEST_FLAG_HIGHEST_SEVERITY</guest_flag>
</guest_flags>
<vcpu_affinity desc="vCPU affinity map. Each vCPU will pin to the selected pCPU ID. Please make sure each vCPU pin to different pCPU.">
<pcpu_id>2</pcpu_id>
</vcpu_affinity>
<clos desc="Class of Service for Cache Allocation Technology. Please refer SDM 17.19.2 for details and use with caution.">0</clos>
<epc_section desc="epc section">
<base desc="SGX EPC section base, must be page aligned">0</base>
@ -94,6 +100,9 @@
<guest_flags desc="Select all applicable flags for the VM" multiselect="true">
<guest_flag>0</guest_flag>
</guest_flags>
<vcpu_affinity desc="vCPU affinity map. Each vCPU will pin to the selected pCPU ID. Please make sure each vCPU pin to different pCPU.">
<pcpu_id>3</pcpu_id>
</vcpu_affinity>
<clos desc="Class of Service for Cache Allocation Technology. Please refer SDM 17.19.2 for details and use with caution.">0</clos>
<epc_section desc="epc section">
<base desc="SGX EPC section base, must be page aligned">0</base>

8
misc/acrn-config/xmls/config-xmls/generic/logical_partition.xml
View File

@ -7,10 +7,10 @@
<guest_flag></guest_flag>
<guest_flag></guest_flag>
</guest_flags>
<pcpu_ids desc="Assign physical CPU IDs to the VM" multiselect="true">
<vcpu_affinity desc="vCPU affinity map. Each vCPU will pin to the selected pCPU ID. Please make sure each vCPU pin to different pCPU.">
<pcpu_id>0</pcpu_id>
<pcpu_id>2</pcpu_id>
</pcpu_ids>
</vcpu_affinity>
<clos desc="Class of Service for Cache Allocation Technology. Please refer SDM 17.19.2 for details and use with caution.">0</clos>
<epc_section desc="epc section">
<base desc="SGX EPC section base, must be page aligned">0</base>
@ -53,10 +53,10 @@
<guest_flag>GUEST_FLAG_RT</guest_flag>
<guest_flag>GUEST_FLAG_LAPIC_PASSTHROUGH</guest_flag>
</guest_flags>
<pcpu_ids desc="Assign physical CPU IDs to the VM" multiselect="true">
<vcpu_affinity desc="vCPU affinity map. Each vCPU will pin to the selected pCPU ID. Please make sure each vCPU pin to different pCPU.">
<pcpu_id>1</pcpu_id>
<pcpu_id>3</pcpu_id>
</pcpu_ids>
</vcpu_affinity>
<clos desc="Class of Service for Cache Allocation Technology. Please refer SDM 17.19.2 for details and use with caution.">0</clos>
<epc_section desc="epc section">
<base desc="SGX EPC section base, must be page aligned">0</base>

8
misc/acrn-config/xmls/config-xmls/generic/sdc.xml
View File

@ -46,6 +46,11 @@
<guest_flags desc="Select all applicable flags for the VM" multiselect="true">
<guest_flag>0</guest_flag>
</guest_flags>
<vcpu_affinity desc="vCPU affinity map. Each vCPU will pin to the selected pCPU ID. Please make sure each vCPU pin to different pCPU.">
<pcpu_id>1</pcpu_id>
<pcpu_id>2</pcpu_id>
<pcpu_id>3</pcpu_id>
</vcpu_affinity>
<clos desc="Class of Service for Cache Allocation Technology. Please refer SDM 17.19.2 for details and use with caution.">0</clos>
<epc_section desc="epc section">
<base desc="SGX EPC section base, must be page aligned">0</base>
@ -68,6 +73,9 @@
<load_order configurable="0" desc="Specify the VM by its load order: PRE_LAUNCHED_VM, SOS_VM or POST_LAUNCHED_VM.">POST_LAUNCHED_VM</load_order>
<uuid configurable="0" desc="vm uuid">a7ada506-1ab0-4b6b-a0da-e513ca9b8c2f</uuid>
<clos desc="Class of Service for Cache Allocation Technology. Please refer SDM 17.19.2 for details and use with caution.">0</clos>
<vcpu_affinity desc="vCPU affinity map. Each vCPU will pin to the selected pCPU ID. Please make sure each vCPU pin to different pCPU.">
<pcpu_id>3</pcpu_id>
</vcpu_affinity>
<epc_section desc="epc section">
<base desc="SGX EPC section base, must be page aligned">0</base>
<size desc="SGX EPC section size in Bytes, must be page aligned">0</size>

9
misc/acrn-config/xmls/config-xmls/generic/sdc2.xml
View File

@ -46,6 +46,9 @@
<guest_flags desc="Select all applicable flags for the VM" multiselect="true">
<guest_flag>0</guest_flag>
</guest_flags>
<vcpu_affinity desc="vCPU affinity map. Each vCPU will pin to the selected pCPU ID. Please make sure each vCPU pin to different pCPU.">
<pcpu_id>1</pcpu_id>
</vcpu_affinity>
<clos desc="Class of Service for Cache Allocation Technology. Please refer SDM 17.19.2 for details and use with caution.">0</clos>
<epc_section desc="epc section">
<base desc="SGX EPC section base, must be page aligned">0</base>
@ -70,6 +73,9 @@
<guest_flags desc="Select all applicable flags for the VM" multiselect="true">
<guest_flag>0</guest_flag>
</guest_flags>
<vcpu_affinity desc="vCPU affinity map. Each vCPU will pin to the selected pCPU ID. Please make sure each vCPU pin to different pCPU.">
<pcpu_id>2</pcpu_id>
</vcpu_affinity>
<clos desc="Class of Service for Cache Allocation Technology. Please refer SDM 17.19.2 for details and use with caution.">0</clos>
<epc_section desc="epc section">
<base desc="SGX EPC section base, must be page aligned">0</base>
@ -94,6 +100,9 @@
<guest_flags desc="Select all applicable flags for the VM" multiselect="true">
<guest_flag>0</guest_flag>
</guest_flags>
<vcpu_affinity desc="vCPU affinity map. Each vCPU will pin to the selected pCPU ID. Please make sure each vCPU pin to different pCPU.">
<pcpu_id>3</pcpu_id>
</vcpu_affinity>
<clos desc="Class of Service for Cache Allocation Technology. Please refer SDM 17.19.2 for details and use with caution.">0</clos>
<epc_section desc="epc section">
<base desc="SGX EPC section base, must be page aligned">0</base>

7
misc/acrn-config/xmls/config-xmls/nuc6cayh/hybrid.xml
View File

@ -6,9 +6,9 @@
<guest_flags desc="Select all applicable flags for the VM" multiselect="true">
<guest_flag>GUEST_FLAG_HIGHEST_SEVERITY</guest_flag>
</guest_flags>
<pcpu_ids desc="Assign physical CPU IDs to the VM" multiselect="true">
<vcpu_affinity desc="vCPU affinity map. Each vCPU will pin to the selected pCPU ID. Please make sure each vCPU pin to different pCPU.">
<pcpu_id>3</pcpu_id>
</pcpu_ids>
</vcpu_affinity>
<clos desc="Class of Service for Cache Allocation Technology. Please refer SDM 17.19.2 for details and use with caution.">0</clos>
<epc_section desc="epc section">
<base desc="SGX EPC section base, must be page aligned">0</base>
@ -89,6 +89,9 @@
<guest_flags desc="Select all applicable flags for the VM" multiselect="true">
<guest_flag>0</guest_flag>
</guest_flags>
<vcpu_affinity desc="vCPU affinity map. Each vCPU will pin to the selected pCPU ID. Please make sure each vCPU pin to different pCPU.">
<pcpu_id>2</pcpu_id>
</vcpu_affinity>
<clos desc="Class of Service for Cache Allocation Technology. Please refer SDM 17.19.2 for details and use with caution.">0</clos>
<epc_section desc="epc section">
<base desc="SGX EPC section base, must be page aligned">0</base>

9
misc/acrn-config/xmls/config-xmls/nuc6cayh/industry.xml
View File

@ -47,6 +47,9 @@
<guest_flags desc="Select all applicable flags for the VM" multiselect="true">
<guest_flag>0</guest_flag>
</guest_flags>
<vcpu_affinity desc="vCPU affinity map. Each vCPU will pin to the selected pCPU ID. Please make sure each vCPU pin to different pCPU.">
<pcpu_id>1</pcpu_id>
</vcpu_affinity>
<clos desc="Class of Service for Cache Allocation Technology. Please refer SDM 17.19.2 for details and use with caution.">0</clos>
<epc_section desc="epc section">
<base desc="SGX EPC section base, must be page aligned">0</base>
@ -71,6 +74,9 @@
<guest_flags desc="Select all applicable flags for the VM" multiselect="true">
<guest_flag>GUEST_FLAG_HIGHEST_SEVERITY</guest_flag>
</guest_flags>
<vcpu_affinity desc="vCPU affinity map. Each vCPU will pin to the selected pCPU ID. Please make sure each vCPU pin to different pCPU.">
<pcpu_id>2</pcpu_id>
</vcpu_affinity>
<clos desc="Class of Service for Cache Allocation Technology. Please refer SDM 17.19.2 for details and use with caution.">0</clos>
<epc_section desc="epc section">
<base desc="SGX EPC section base, must be page aligned">0</base>
@ -95,6 +101,9 @@
<guest_flags desc="Select all applicable flags for the VM" multiselect="true">
<guest_flag>0</guest_flag>
</guest_flags>
<vcpu_affinity desc="vCPU affinity map. Each vCPU will pin to the selected pCPU ID. Please make sure each vCPU pin to different pCPU.">
<pcpu_id>3</pcpu_id>
</vcpu_affinity>
<clos desc="Class of Service for Cache Allocation Technology. Please refer SDM 17.19.2 for details and use with caution.">0</clos>
<epc_section desc="epc section">
<base desc="SGX EPC section base, must be page aligned">0</base>

8
misc/acrn-config/xmls/config-xmls/nuc6cayh/logical_partition.xml
View File

@ -7,10 +7,10 @@
<guest_flag></guest_flag>
<guest_flag></guest_flag>
</guest_flags>
<pcpu_ids desc="Assign physical CPU IDs to the VM" multiselect="true">
<vcpu_affinity desc="vCPU affinity map. Each vCPU will pin to the selected pCPU ID. Please make sure each vCPU pin to different pCPU.">
<pcpu_id>0</pcpu_id>
<pcpu_id>2</pcpu_id>
</pcpu_ids>
</vcpu_affinity>
<clos desc="Class of Service for Cache Allocation Technology. Please refer SDM 17.19.2 for details and use with caution.">0</clos>
<epc_section desc="epc section">
<base desc="SGX EPC section base, must be page aligned">0</base>
@ -53,10 +53,10 @@
<guest_flag>GUEST_FLAG_RT</guest_flag>
<guest_flag>GUEST_FLAG_LAPIC_PASSTHROUGH</guest_flag>
</guest_flags>
<pcpu_ids desc="Assign physical CPU IDs to the VM" multiselect="true">
<vcpu_affinity desc="vCPU affinity map. Each vCPU will pin to the selected pCPU ID. Please make sure each vCPU pin to different pCPU.">
<pcpu_id>1</pcpu_id>
<pcpu_id>3</pcpu_id>
</pcpu_ids>
</vcpu_affinity>
<clos desc="Class of Service for Cache Allocation Technology. Please refer SDM 17.19.2 for details and use with caution.">0</clos>
<epc_section desc="epc section">
<base desc="SGX EPC section base, must be page aligned">0</base>

8
misc/acrn-config/xmls/config-xmls/nuc6cayh/sdc.xml
View File

@ -47,6 +47,11 @@
<guest_flags desc="Select all applicable flags for the VM" multiselect="true">
<guest_flag>0</guest_flag>
</guest_flags>
<vcpu_affinity desc="vCPU affinity map. Each vCPU will pin to the selected pCPU ID. Please make sure each vCPU pin to different pCPU.">
<pcpu_id>1</pcpu_id>
<pcpu_id>2</pcpu_id>
<pcpu_id>3</pcpu_id>
</vcpu_affinity>
<clos desc="Class of Service for Cache Allocation Technology. Please refer SDM 17.19.2 for details and use with caution.">0</clos>
<epc_section desc="epc section">
<base desc="SGX EPC section base, must be page aligned">0</base>
@ -69,6 +74,9 @@
<load_order configurable="0" desc="Specify the VM by its load order: PRE_LAUNCHED_VM, SOS_VM or POST_LAUNCHED_VM.">POST_LAUNCHED_VM</load_order>
<uuid configurable="0" desc="vm uuid">a7ada506-1ab0-4b6b-a0da-e513ca9b8c2f</uuid>
<clos desc="Class of Service for Cache Allocation Technology. Please refer SDM 17.19.2 for details and use with caution.">0</clos>
<vcpu_affinity desc="vCPU affinity map. Each vCPU will pin to the selected pCPU ID. Please make sure each vCPU pin to different pCPU.">
<pcpu_id>3</pcpu_id>
</vcpu_affinity>
<epc_section desc="epc section">
<base desc="SGX EPC section base, must be page aligned">0</base>
<size desc="SGX EPC section size in Bytes, must be page aligned">0</size>

9
misc/acrn-config/xmls/config-xmls/nuc6cayh/sdc2.xml
View File

@ -47,6 +47,9 @@
<guest_flags desc="Select all applicable flags for the VM" multiselect="true">
<guest_flag>0</guest_flag>
</guest_flags>
<vcpu_affinity desc="vCPU affinity map. Each vCPU will pin to the selected pCPU ID. Please make sure each vCPU pin to different pCPU.">
<pcpu_id>1</pcpu_id>
</vcpu_affinity>
<clos desc="Class of Service for Cache Allocation Technology. Please refer SDM 17.19.2 for details and use with caution.">0</clos>
<epc_section desc="epc section">
<base desc="SGX EPC section base, must be page aligned">0</base>
@ -71,6 +74,9 @@
<guest_flags desc="Select all applicable flags for the VM" multiselect="true">
<guest_flag>0</guest_flag>
</guest_flags>
<vcpu_affinity desc="vCPU affinity map. Each vCPU will pin to the selected pCPU ID. Please make sure each vCPU pin to different pCPU.">
<pcpu_id>2</pcpu_id>
</vcpu_affinity>
<clos desc="Class of Service for Cache Allocation Technology. Please refer SDM 17.19.2 for details and use with caution.">0</clos>
<epc_section desc="epc section">
<base desc="SGX EPC section base, must be page aligned">0</base>
@ -95,6 +101,9 @@
<guest_flags desc="Select all applicable flags for the VM" multiselect="true">
<guest_flag>0</guest_flag>
</guest_flags>
<vcpu_affinity desc="vCPU affinity map. Each vCPU will pin to the selected pCPU ID. Please make sure each vCPU pin to different pCPU.">
<pcpu_id>3</pcpu_id>
</vcpu_affinity>
<clos desc="Class of Service for Cache Allocation Technology. Please refer SDM 17.19.2 for details and use with caution.">0</clos>
<epc_section desc="epc section">
<base desc="SGX EPC section base, must be page aligned">0</base>

7
misc/acrn-config/xmls/config-xmls/nuc7i7dnb/hybrid.xml
View File

@ -6,9 +6,9 @@
<guest_flags desc="Select all applicable flags for the VM" multiselect="true">
<guest_flag>GUEST_FLAG_HIGHEST_SEVERITY</guest_flag>
</guest_flags>
<pcpu_ids desc="Assign physical CPU IDs to the VM" multiselect="true">
<vcpu_affinity desc="vCPU affinity map. Each vCPU will pin to the selected pCPU ID. Please make sure each vCPU pin to different pCPU.">
<pcpu_id>3</pcpu_id>
</pcpu_ids>
</vcpu_affinity>
<clos desc="Class of Service for Cache Allocation Technology. Please refer SDM 17.19.2 for details and use with caution.">0</clos>
<epc_section desc="epc section">
<base desc="SGX EPC section base, must be page aligned">0</base>
@ -89,6 +89,9 @@
<guest_flags desc="Select all applicable flags for the VM" multiselect="true">
<guest_flag>0</guest_flag>
</guest_flags>
<vcpu_affinity desc="vCPU affinity map. Each vCPU will pin to the selected pCPU ID. Please make sure each vCPU pin to different pCPU.">
<pcpu_id>2</pcpu_id>
</vcpu_affinity>
<clos desc="Class of Service for Cache Allocation Technology. Please refer SDM 17.19.2 for details and use with caution.">0</clos>
<epc_section desc="epc section">
<base desc="SGX EPC section base, must be page aligned">0</base>

9
misc/acrn-config/xmls/config-xmls/nuc7i7dnb/industry.xml
View File

@ -47,6 +47,9 @@
<guest_flags desc="Select all applicable flags for the VM" multiselect="true">
<guest_flag>0</guest_flag>
</guest_flags>
<vcpu_affinity desc="vCPU affinity map. Each vCPU will pin to the selected pCPU ID. Please make sure each vCPU pin to different pCPU.">
<pcpu_id>1</pcpu_id>
</vcpu_affinity>
<clos desc="Class of Service for Cache Allocation Technology. Please refer SDM 17.19.2 for details and use with caution.">0</clos>
<epc_section desc="epc section">
<base desc="SGX EPC section base, must be page aligned">0</base>
@ -71,6 +74,9 @@
<guest_flags desc="Select all applicable flags for the VM" multiselect="true">
<guest_flag>GUEST_FLAG_HIGHEST_SEVERITY</guest_flag>
</guest_flags>
<vcpu_affinity desc="vCPU affinity map. Each vCPU will pin to the selected pCPU ID. Please make sure each vCPU pin to different pCPU.">
<pcpu_id>2</pcpu_id>
</vcpu_affinity>
<clos desc="Class of Service for Cache Allocation Technology. Please refer SDM 17.19.2 for details and use with caution.">0</clos>
<epc_section desc="epc section">
<base desc="SGX EPC section base, must be page aligned">0</base>
@ -95,6 +101,9 @@
<guest_flags desc="Select all applicable flags for the VM" multiselect="true">
<guest_flag>0</guest_flag>
</guest_flags>
<vcpu_affinity desc="vCPU affinity map. Each vCPU will pin to the selected pCPU ID. Please make sure each vCPU pin to different pCPU.">
<pcpu_id>3</pcpu_id>
</vcpu_affinity>
<clos desc="Class of Service for Cache Allocation Technology. Please refer SDM 17.19.2 for details and use with caution.">0</clos>
<epc_section desc="epc section">
<base desc="SGX EPC section base, must be page aligned">0</base>

8
misc/acrn-config/xmls/config-xmls/nuc7i7dnb/logical_partition.xml
View File

@ -7,10 +7,10 @@
<guest_flag></guest_flag>
<guest_flag></guest_flag>
</guest_flags>
<pcpu_ids desc="Assign physical CPU IDs to the VM" multiselect="true">
<vcpu_affinity desc="vCPU affinity map. Each vCPU will pin to the selected pCPU ID. Please make sure each vCPU pin to different pCPU.">
<pcpu_id>0</pcpu_id>
<pcpu_id>2</pcpu_id>
</pcpu_ids>
</vcpu_affinity>
<clos desc="Class of Service for Cache Allocation Technology. Please refer SDM 17.19.2 for details and use with caution.">0</clos>
<epc_section desc="epc section">
<base desc="SGX EPC section base, must be page aligned">0</base>
@ -53,10 +53,10 @@
<guest_flag>GUEST_FLAG_RT</guest_flag>
<guest_flag>GUEST_FLAG_LAPIC_PASSTHROUGH</guest_flag>
</guest_flags>
<pcpu_ids desc="Assign physical CPU IDs to the VM" multiselect="true">
<vcpu_affinity desc="vCPU affinity map. Each vCPU will pin to the selected pCPU ID. Please make sure each vCPU pin to different pCPU.">
<pcpu_id>1</pcpu_id>
<pcpu_id>3</pcpu_id>
</pcpu_ids>
</vcpu_affinity>
<clos desc="Class of Service for Cache Allocation Technology. Please refer SDM 17.19.2 for details and use with caution.">0</clos>
<epc_section desc="epc section">
<base desc="SGX EPC section base, must be page aligned">0</base>

8
misc/acrn-config/xmls/config-xmls/nuc7i7dnb/sdc.xml
View File

@ -47,6 +47,11 @@
<guest_flags desc="Select all applicable flags for the VM" multiselect="true">
<guest_flag>0</guest_flag>
</guest_flags>
<vcpu_affinity desc="vCPU affinity map. Each vCPU will pin to the selected pCPU ID. Please make sure each vCPU pin to different pCPU.">
<pcpu_id>1</pcpu_id>
<pcpu_id>2</pcpu_id>
<pcpu_id>3</pcpu_id>
</vcpu_affinity>
<clos desc="Class of Service for Cache Allocation Technology. Please refer SDM 17.19.2 for details and use with caution.">0</clos>
<epc_section desc="epc section">
<base desc="SGX EPC section base, must be page aligned">0</base>
@ -69,6 +74,9 @@
<load_order configurable="0" desc="Specify the VM by its load order: PRE_LAUNCHED_VM, SOS_VM or POST_LAUNCHED_VM.">POST_LAUNCHED_VM</load_order>
<uuid configurable="0" desc="vm uuid">a7ada506-1ab0-4b6b-a0da-e513ca9b8c2f</uuid>
<clos desc="Class of Service for Cache Allocation Technology. Please refer SDM 17.19.2 for details and use with caution.">0</clos>
<vcpu_affinity desc="vCPU affinity map. Each vCPU will pin to the selected pCPU ID. Please make sure each vCPU pin to different pCPU.">
<pcpu_id>3</pcpu_id>
</vcpu_affinity>
<epc_section desc="epc section">
<base desc="SGX EPC section base, must be page aligned">0</base>
<size desc="SGX EPC section size in Bytes, must be page aligned">0</size>

9
misc/acrn-config/xmls/config-xmls/nuc7i7dnb/sdc2.xml
View File

@ -47,6 +47,9 @@
<guest_flags desc="Select all applicable flags for the VM" multiselect="true">
<guest_flag>0</guest_flag>
</guest_flags>
<vcpu_affinity desc="vCPU affinity map. Each vCPU will pin to the selected pCPU ID. Please make sure each vCPU pin to different pCPU.">
<pcpu_id>1</pcpu_id>
</vcpu_affinity>
<clos desc="Class of Service for Cache Allocation Technology. Please refer SDM 17.19.2 for details and use with caution.">0</clos>
<epc_section desc="epc section">
<base desc="SGX EPC section base, must be page aligned">0</base>
@ -71,6 +74,9 @@
<guest_flags desc="Select all applicable flags for the VM" multiselect="true">
<guest_flag>0</guest_flag>
</guest_flags>
<vcpu_affinity desc="vCPU affinity map. Each vCPU will pin to the selected pCPU ID. Please make sure each vCPU pin to different pCPU.">
<pcpu_id>2</pcpu_id>
</vcpu_affinity>
<clos desc="Class of Service for Cache Allocation Technology. Please refer SDM 17.19.2 for details and use with caution.">0</clos>
<epc_section desc="epc section">
<base desc="SGX EPC section base, must be page aligned">0</base>
@ -95,6 +101,9 @@
<guest_flags desc="Select all applicable flags for the VM" multiselect="true">
<guest_flag>0</guest_flag>
</guest_flags>
<vcpu_affinity desc="vCPU affinity map. Each vCPU will pin to the selected pCPU ID. Please make sure each vCPU pin to different pCPU.">
<pcpu_id>3</pcpu_id>
</vcpu_affinity>
<clos desc="Class of Service for Cache Allocation Technology. Please refer SDM 17.19.2 for details and use with caution.">0</clos>
<epc_section desc="epc section">
<base desc="SGX EPC section base, must be page aligned">0</base>