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https://github.com/projectacrn/acrn-hypervisor.git
synced 2025-06-23 22:18:17 +00:00
hv: pirq: do not indicate priority when allocate vector
It's not necessary to specify priority for dynamic allocated vector, because nested irq is not supported on HV, and irq of any priority would cause VM exit. This commit makes the following changes: - remove the argument indicating priority in struct irq_request_info and following functions: ptdev_activate_entry() find_available_vector() irq_desc_alloc_vector() normal_register_handler() - change the macro of vector ranges: VECTOR_DYNAMIC_START/END for dynamically allocable vectors; VECTOR_FIXED_START/END for fixed allocated vectors, such as vector for timer etc. Signed-off-by: Yan, Like <like.yan@intel.com> Acked-by: Anthony Xu <anthony.xu@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
This commit is contained in:
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229bf32eb5
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c492a14e53
@ -629,7 +629,6 @@ int ptdev_msix_remap(struct vm *vm, uint16_t virt_bdf,
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struct ptdev_msi_info *info)
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{
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struct ptdev_remapping_info *entry;
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bool lowpri = !is_vm0(vm);
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/*
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* Device Model should pre-hold the mapping entries by calling
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@ -668,7 +667,7 @@ int ptdev_msix_remap(struct vm *vm, uint16_t virt_bdf,
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if (!is_entry_active(entry)) {
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/* update msi source and active entry */
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ptdev_activate_entry(entry, IRQ_INVALID, lowpri);
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ptdev_activate_entry(entry, IRQ_INVALID);
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}
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/* build physical config MSI, update to info->pmsi_xxx */
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@ -738,7 +737,6 @@ int ptdev_intx_pin_remap(struct vm *vm, struct ptdev_intx_info *info)
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union ioapic_rte rte;
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uint32_t phys_irq;
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uint8_t phys_pin;
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bool lowpri = !is_vm0(vm);
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bool need_switch_vpin_src = false;
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struct ptdev_intx_info *intx;
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@ -874,7 +872,7 @@ int ptdev_intx_pin_remap(struct vm *vm, struct ptdev_intx_info *info)
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activate_physical_ioapic(vm, entry);
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} else {
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/* active entry */
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ptdev_activate_entry(entry, phys_irq, lowpri);
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ptdev_activate_entry(entry, phys_irq);
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activate_physical_ioapic(vm, entry);
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@ -472,7 +472,7 @@ vioapic_process_eoi(struct vm *vm, uint32_t vector)
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uint32_t pin, pincount = vioapic_pincount(vm);
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union ioapic_rte rte;
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if (vector < VECTOR_FOR_INTR_START || vector > NR_MAX_VECTOR) {
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if (vector < VECTOR_DYNAMIC_START || vector > NR_MAX_VECTOR) {
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pr_err("vioapic_process_eoi: invalid vector %u", vector);
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}
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@ -372,7 +372,7 @@ void setup_ioapic_irq(void)
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* for legacy irq, reserved vector and never free
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*/
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if (gsi < NR_LEGACY_IRQ) {
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vr = irq_desc_alloc_vector(gsi, false);
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vr = irq_desc_alloc_vector(gsi);
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if (vr > NR_MAX_VECTOR) {
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pr_err("failed to alloc VR");
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gsi++;
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@ -31,24 +31,14 @@ static void init_irq_desc(void)
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}
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/*
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* alloc vector 0x20-0xDF for irq
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* lowpri: 0x20-0x7F
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* highpri: 0x80-0xDF
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* find available vector VECTOR_DYNAMIC_START ~ VECTOR_DYNAMIC_END
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*/
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static uint32_t find_available_vector(bool lowpri)
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static uint32_t find_available_vector()
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{
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uint32_t i, start, end;
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if (lowpri) {
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start = VECTOR_FOR_NOR_LOWPRI_START;
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end = VECTOR_FOR_NOR_LOWPRI_END;
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} else {
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start = VECTOR_FOR_NOR_HIGHPRI_START;
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end = VECTOR_FOR_NOR_HIGHPRI_END;
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}
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uint32_t i;
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/* TODO: vector lock required */
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for (i = start; i < end; i++) {
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for (i = VECTOR_DYNAMIC_START; i <= VECTOR_DYNAMIC_END; i++) {
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if (vector_to_irq[i] == IRQ_INVALID) {
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return i;
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}
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@ -269,11 +259,11 @@ common_register_handler(uint32_t irq_arg,
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OUT:
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if (added) {
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/* it is safe to call irq_desc_alloc_vector multiple times*/
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if (info->vector >= VECTOR_FOR_PRI_START &&
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info->vector <= VECTOR_FOR_PRI_END) {
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if (info->vector >= VECTOR_FIXED_START &&
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info->vector <= VECTOR_FIXED_END) {
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irq_desc_set_vector(irq, info->vector);
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} else if (info->vector > NR_MAX_VECTOR) {
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irq_desc_alloc_vector(irq, info->lowpri);
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irq_desc_alloc_vector(irq);
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} else {
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pr_err("the input vector is not correct");
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free(node);
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@ -296,7 +286,7 @@ OUT:
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}
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/* it is safe to call irq_desc_alloc_vector multiple times*/
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uint32_t irq_desc_alloc_vector(uint32_t irq, bool lowpri)
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uint32_t irq_desc_alloc_vector(uint32_t irq)
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{
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uint32_t vr = VECTOR_INVALID;
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struct irq_desc *desc;
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@ -316,7 +306,7 @@ uint32_t irq_desc_alloc_vector(uint32_t irq, bool lowpri)
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}
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/* FLAT mode, a irq connected to every cpu's same vector */
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vr = find_available_vector(lowpri);
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vr = find_available_vector();
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if (vr > NR_MAX_VECTOR) {
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pr_err("no vector found for irq[%d]", irq);
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goto OUT;
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@ -634,20 +624,18 @@ UNLOCK_EXIT:
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}
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/*
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* Allocate IRQ with Vector from 0x20 ~ 0xDF
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* Allocate IRQ with Vector from VECTOR_DYNAMIC_START ~ VECTOR_DYNAMIC_END
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*/
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struct dev_handler_node*
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normal_register_handler(uint32_t irq,
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dev_handler_t func,
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void *dev_data,
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bool share,
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bool lowpri,
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const char *name)
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{
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struct irq_request_info info;
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info.vector = VECTOR_INVALID;
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info.lowpri = lowpri;
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info.func = func;
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info.dev_data = dev_data;
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info.share = share;
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@ -657,7 +645,7 @@ normal_register_handler(uint32_t irq,
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}
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/*
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* Allocate IRQ with vector from 0xE0 ~ 0xFF
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* Allocate IRQ with vector from VECTOR_FIXED_START ~ VECTOR_FIXED_END
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* Allocate a IRQ and install isr on that specific cpu
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* User can install same irq/isr on different CPU by call this function multiple
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* times
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@ -671,12 +659,11 @@ pri_register_handler(uint32_t irq,
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{
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struct irq_request_info info;
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if (vector < VECTOR_FOR_PRI_START || vector > VECTOR_FOR_PRI_END) {
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if (vector < VECTOR_FIXED_START || vector > VECTOR_FIXED_END) {
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return NULL;
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}
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info.vector = vector;
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info.lowpri = false;
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info.func = func;
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info.dev_data = dev_data;
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info.share = true;
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@ -827,7 +827,7 @@ static int dmar_setup_interrupt(struct dmar_drhd_rt *dmar_uint)
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dmar_uint->dmar_irq_node = normal_register_handler(IRQ_INVALID,
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dmar_fault_handler,
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dmar_uint, true, false,
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dmar_uint, true,
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"dmar_fault_event");
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if (dmar_uint->dmar_irq_node == NULL) {
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@ -129,14 +129,13 @@ static int ptdev_interrupt_handler(__unused int irq, void *data)
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/* active intr with irq registering */
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void
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ptdev_activate_entry(struct ptdev_remapping_info *entry, uint32_t phys_irq,
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bool lowpri)
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ptdev_activate_entry(struct ptdev_remapping_info *entry, uint32_t phys_irq)
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{
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struct dev_handler_node *node;
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/* register and allocate host vector/irq */
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node = normal_register_handler(phys_irq, ptdev_interrupt_handler,
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(void *)entry, true, lowpri, "dev assign");
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(void *)entry, true, "dev assign");
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ASSERT(node != NULL, "dev register failed");
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entry->node = node;
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@ -9,18 +9,14 @@
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#include <common/irq.h>
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/* vectors for normal, usually for devices */
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#define VECTOR_FOR_NOR_LOWPRI_START 0x20U
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#define VECTOR_FOR_NOR_LOWPRI_END 0x7FU
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#define VECTOR_FOR_NOR_HIGHPRI_START 0x80U
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#define VECTOR_FOR_NOR_HIGHPRI_END 0xDFU
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#define VECTOR_FOR_NOR_END VECTOR_FOR_NOR_HIGHPRI_END
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/* vectors range for dynamic allocation, usually for devices */
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#define VECTOR_DYNAMIC_START 0x20U
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#define VECTOR_DYNAMIC_END 0xDFU
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#define VECTOR_FOR_INTR_START VECTOR_FOR_NOR_LOWPRI_START
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/* vectors range for fixed vectors, usually for HV service */
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#define VECTOR_FIXED_START 0xE0U
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#define VECTOR_FIXED_END 0xFFU
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/* vectors for priority, usually for HV service */
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#define VECTOR_FOR_PRI_START 0xE0U
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#define VECTOR_FOR_PRI_END 0xFFU
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#define VECTOR_TIMER 0xEFU
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#define VECTOR_NOTIFY_VCPU 0xF0U
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#define VECTOR_VIRT_IRQ_VHM 0xF7U
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@ -33,7 +33,6 @@ struct irq_request_info {
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dev_handler_t func;
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void *dev_data;
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bool share;
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bool lowpri;
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char *name;
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};
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@ -61,7 +60,7 @@ struct dev_handler_node {
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uint32_t irq_mark_used(uint32_t irq);
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uint32_t irq_desc_alloc_vector(uint32_t irq, bool lowpri);
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uint32_t irq_desc_alloc_vector(uint32_t irq);
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void irq_desc_try_free_vector(uint32_t irq);
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uint32_t irq_to_vector(uint32_t irq);
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@ -80,7 +79,6 @@ normal_register_handler(uint32_t irq,
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dev_handler_t func,
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void *dev_data,
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bool share,
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bool lowpri,
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const char *name);
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void unregister_handler_common(struct dev_handler_node *node);
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@ -75,7 +75,7 @@ struct ptdev_remapping_info *alloc_entry(struct vm *vm,
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void release_entry(struct ptdev_remapping_info *entry);
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void ptdev_activate_entry(
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struct ptdev_remapping_info *entry,
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uint32_t phys_irq, bool lowpri);
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uint32_t phys_irq);
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void ptdev_deactivate_entry(struct ptdev_remapping_info *entry);
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#ifdef HV_DEBUG
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