DM USB: xHCI: Set correct PCI VID/PID for APL DRD cap.

For dedicated xHCI extended capability, it need set corresponding PCI VID/PID.
This patch sets the Intel Apollo Lake platform PCI VID/PID for DRD
capability which will be checked for enabling DRD fucntion in new DRD
driver. Besides, this patch refines the PCI VID/PID related code.

Signed-off-by: Liang Yang <liang3.yang@intel.com>
Reviewed-by: Xiaoguang Wu <xiaoguang.wu@intel.com>
Reviewed-by: Yu Wang <yu1.wang@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
This commit is contained in:
Liang Yang
2018-06-25 15:43:44 +08:00
committed by lijinxia
parent 1185884b97
commit c638010b66
2 changed files with 19 additions and 2 deletions

View File

@@ -240,6 +240,16 @@
#define EXCAP_GROUP_END 0xFFFF
#define EXCAP_GROUP_NULL NULL
/* xHCI PCI Vendor IDs */
#define XHCI_PCI_VENDOR_ID_INTEL 0x8086
/* xHCI PCI Device IDs */
#define XHCI_PCI_DEVICE_ID_INTEL_APL 0x5aa8
/* Default xHCI PCI VID/PID */
#define XHCI_PCI_VENDOR_ID_DFLT XHCI_PCI_VENDOR_ID_INTEL
#define XHCI_PCI_DEVICE_ID_DFLT 0x1e31
/* Intel APL xHCI DRD Configuration registers */
#define XHCI_DRD_MUX_CFG0 0x0000
#define XHCI_DRD_MUX_CFG1 0x0004