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DM USB: xHCI: refine xHCI extended capability related functions.
Every platform should have their own xHCI specific extended capabilities, but the current xHCI DM is not scalable for them. This patch refines related logic to make it scalable. Current code only support 4 registers(4*32) as basic extended capabilites. Base on this new implementation, the mmio range from excapoff to regsend will cover real excap size according to the cap parameter. Change-Id: Ic55a4494e090ec255939cdb8f32950e3c8a66082 Signed-off-by: Liang Yang <liang3.yang@intel.com> Reviewed-by: Xiaoguang Wu <xiaoguang.wu@intel.com> Reviewed-by: Yu Wang <yu1.wang@intel.com> Reviewed-by: Kevin Tian <kevin.tian@intel.com>
This commit is contained in:
16
devicemodel/include/xhci.h
Normal file → Executable file
16
devicemodel/include/xhci.h
Normal file → Executable file
@@ -86,6 +86,22 @@ enum {
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#define XHCI_TD_ALIGN 64 /* bytes */
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#define XHCI_PAGE_SIZE 4096 /* bytes */
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/* xHCI extended capability supported protocol fileds */
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#define DEFINE_EXCP_PROT(name, next_ptr, revmaj, portoff, portcnt) \
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struct pci_xhci_excap_prot excap_##name = { \
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{ \
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.cap_id = XHCI_ID_PROTOCOLS, \
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.cap_ptr = next_ptr \
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}, \
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.rev_min = 0x00, \
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.rev_maj = revmaj, \
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.string = "USB"#revmaj, \
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.port_off = portoff, \
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.port_cnt = portcnt, \
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.psic_prot_def = 0x00, \
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.reserve = 0x00 \
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}
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struct xhci_slot_ctx {
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volatile uint32_t dwSctx0;
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#define XHCI_SCTX_0_ROUTE_SET(x) ((x) & 0xFFFFF)
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11
devicemodel/include/xhcireg.h
Normal file → Executable file
11
devicemodel/include/xhcireg.h
Normal file → Executable file
@@ -228,6 +228,17 @@
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#define XHCI_ID_MSG_IRQ 0x0005
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#define XHCI_ID_USB_LOCAL_MEM 0x0006
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/*
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* xHCI extended capability pointer in HCCPARAMS1.
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* The excap offset is calculated by left shift 2
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* bits which equals 0x8000
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*/
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#define XHCI_EXCAP_PTR 0x2000
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/* xHCI extended capability group end marker */
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#define EXCAP_GROUP_END 0xFFFF
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#define EXCAP_GROUP_NULL NULL
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/* XHCI register R/W wrappers */
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#define XREAD1(sc, what, a) \
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bus_space_read_1((sc)->sc_io_tag, (sc)->sc_io_hdl, \
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