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DM USB: xHCI: refine xHCI extended capability related functions.

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Every platform should have their own xHCI specific extended
capabilities, but the current xHCI DM is not scalable for them. This
patch refines related logic to make it scalable.

Current code only support 4 registers(4*32) as basic extended
capabilites. Base on this new implementation, the mmio range from
excapoff to regsend will cover real excap size according to the cap
parameter.

Change-Id: Ic55a4494e090ec255939cdb8f32950e3c8a66082
Signed-off-by: Liang Yang <liang3.yang@intel.com>
Reviewed-by: Xiaoguang Wu <xiaoguang.wu@intel.com>
Reviewed-by: Yu Wang <yu1.wang@intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
This commit is contained in:
YanLiang
2018-05-22 19:41:12 +08:00
committed by lijinxia
parent ba1b034e1e
commit c91590ccfd
3 changed files with 115 additions and 48 deletions
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16
devicemodel/include/xhci.h Normal file → Executable file
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@@ -86,6 +86,22 @@ enum {
#define XHCI_TD_ALIGN 64 /* bytes */
#define XHCI_PAGE_SIZE 4096 /* bytes */
/* xHCI extended capability supported protocol fileds */
#define DEFINE_EXCP_PROT(name, next_ptr, revmaj, portoff, portcnt) \
struct pci_xhci_excap_prot excap_##name = { \
{ \
.cap_id = XHCI_ID_PROTOCOLS, \
.cap_ptr = next_ptr \
}, \
.rev_min = 0x00, \
.rev_maj = revmaj, \
.string = "USB"#revmaj, \
.port_off = portoff, \
.port_cnt = portcnt, \
.psic_prot_def = 0x00, \
.reserve = 0x00 \
}
struct xhci_slot_ctx {
volatile uint32_t dwSctx0;
#define XHCI_SCTX_0_ROUTE_SET(x) ((x) & 0xFFFFF)