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hv: vlapic: properly initialize DCR
DCR is initialized to 0 which means divisor shift is 1. Currently, both are initialized to 0 which result in incorrect APIC timer counts if the vLAPIC's DCR is never programmed. This bug was exposed by OVMF because OVMF does not program DCR during LAPIC initialization. Tracked-On: #2543 Signed-off-by: Peter Fang <peter.fang@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
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@ -1758,6 +1758,7 @@ vlapic_reset(struct acrn_vlapic *vlapic)
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lapic->icr_timer.v = 0U;
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lapic->dcr_timer.v = 0U;
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vlapic_dcr_write_handler(vlapic);
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vlapic_reset_timer(vlapic);
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vlapic->svr_last = lapic->svr.v;
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@ -1809,6 +1810,7 @@ void vlapic_restore(struct acrn_vlapic *vlapic, const struct lapic_regs *regs)
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lapic->icr_timer = regs->icr_timer;
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lapic->ccr_timer = regs->ccr_timer;
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lapic->dcr_timer = regs->dcr_timer;
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vlapic_dcr_write_handler(vlapic);
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}
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static uint64_t
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