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HV: vpci: refine vbar sizing

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For a pci BAR, its size aligned bits have fixed to 0(except the memory
type bits, they have another fixed value), they are read-only.
When write ~0U to BAR for sizing, (type_bits | size_mask) is written
into BAR.
So do not need to distinguish between sizing vBAR and programming vBAR.
When write a value to vBAR, always store (value & size_mask | type_bit)
to vfcg.
pci_vdev_read_vbar() is unnecessary, because it is only need to read
vcfg.

Tracked-On: #6011
Signed-off-by: Tao Yuhong <yuhong.tao@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
Reviewed-by: Li Fei <fei1.li@intel.com>
This commit is contained in:
Tao Yuhong
2021-04-09 09:53:17 -04:00
committed by wenlingz
parent 5ecca6b256
commit cb75de2163
5 changed files with 8 additions and 37 deletions
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1
hypervisor/dm/vpci/vpci_priv.h
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@@ -174,7 +174,6 @@ uint32_t pci_vdev_read_vcfg(const struct pci_vdev *vdev, uint32_t offset, uint32
void pci_vdev_write_vcfg(struct pci_vdev *vdev, uint32_t offset, uint32_t bytes, uint32_t val);
uint32_t vpci_add_capability(struct pci_vdev *vdev, uint8_t *capdata, uint8_t caplen);
uint32_t pci_vdev_read_vbar(const struct pci_vdev *vdev, uint32_t idx);
void pci_vdev_write_vbar(struct pci_vdev *vdev, uint32_t idx, uint32_t val);
void vdev_pt_hide_sriov_cap(struct pci_vdev *vdev);