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hv: Pass-through IA32_TSC_AUX MSR to L1 guest

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Use an unused MSR on host to save ACRN pcpu ID and avoid saving and
restoring TSC AUX MSR on VMX transitions.

Tracked-On: #6289
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Signed-off-by: Zide Chen <zide.chen@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
This commit is contained in:
Zide Chen
2021-07-05 11:39:17 -07:00
committed by wenlingz
parent d33c76f701
commit cbf3825140
5 changed files with 9 additions and 14 deletions
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4
hypervisor/arch/x86/guest/vmcs.c
View File

@@ -204,9 +204,11 @@ void init_host_state(void)
pr_dbg("vm exit return address = %016lx ", value64);
/* As a type I hypervisor, just init sysenter fields to 0 */
exec_vmwrite32(VMX_HOST_IA32_SYSENTER_CS, 0U);
exec_vmwrite(VMX_HOST_IA32_SYSENTER_ESP, 0UL);
exec_vmwrite(VMX_HOST_IA32_SYSENTER_EIP, 0UL);
/* We use IA32_SYSENTER_CS MSR to cache pCPU ID. */
exec_vmwrite32(VMX_HOST_IA32_SYSENTER_CS, msr_read(ACRN_PSEUDO_PCPUID_MSR));
}
static uint32_t check_vmx_ctrl(uint32_t msr, uint32_t ctrl_req)

6
hypervisor/arch/x86/guest/vmsr.c
View File

@@ -314,12 +314,6 @@ static void prepare_auto_msr_area (struct acrn_vcpu *vcpu)
vcpu->arch.msr_area.count = 0U;
vcpu->arch.msr_area.guest[MSR_AREA_TSC_AUX].msr_index = MSR_IA32_TSC_AUX;
vcpu->arch.msr_area.guest[MSR_AREA_TSC_AUX].value = vcpu->vcpu_id;
vcpu->arch.msr_area.host[MSR_AREA_TSC_AUX].msr_index = MSR_IA32_TSC_AUX;
vcpu->arch.msr_area.host[MSR_AREA_TSC_AUX].value = pcpuid_from_vcpu(vcpu);
vcpu->arch.msr_area.count++;
/* only load/restore MSR IA32_PQR_ASSOC when hv and guest have differnt settings */
if (is_platform_rdt_capable() && (vcpu_clos != hv_clos)) {
vcpu->arch.msr_area.guest[MSR_AREA_IA32_PQR_ASSOC].msr_index = MSR_IA32_PQR_ASSOC;