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hv: Pass-through IA32_TSC_AUX MSR to L1 guest

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Use an unused MSR on host to save ACRN pcpu ID and avoid saving and
restoring TSC AUX MSR on VMX transitions.

Tracked-On: #6289
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Signed-off-by: Zide Chen <zide.chen@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
This commit is contained in:
Zide Chen
2021-07-05 11:39:17 -07:00
committed by wenlingz
parent d33c76f701
commit cbf3825140
5 changed files with 9 additions and 14 deletions
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8
hypervisor/include/arch/x86/asm/cpu.h
View File

@@ -39,6 +39,7 @@
#define CPU_H
#include <types.h>
#include <acrn_common.h>
#include <asm/msr.h>
/* Define CPU stack alignment */
#define CPU_STACK_ALIGN 16UL
@@ -630,16 +631,15 @@ cpu_rdtscp_execute(uint64_t *timestamp_ptr, uint32_t *cpu_id_ptr)
CPU_RFLAGS_RESTORE(rflags); \
}
#define ACRN_PSEUDO_PCPUID_MSR MSR_IA32_SYSENTER_CS
/*
* Macro to get CPU ID
* @pre: the return CPU ID would never equal or large than phys_cpu_num.
*/
static inline uint16_t get_pcpu_id(void)
{
uint32_t tsl, tsh, cpu_id;
asm volatile ("rdtscp":"=a" (tsl), "=d"(tsh), "=c"(cpu_id)::);
return (uint16_t)cpu_id;
return (uint16_t)cpu_msr_read(ACRN_PSEUDO_PCPUID_MSR);
}
static inline uint64_t cpu_rsp_get(void)

3
hypervisor/include/arch/x86/asm/guest/vcpu.h
View File

@@ -197,8 +197,7 @@ struct msr_store_entry {
} __aligned(16);
enum {
MSR_AREA_TSC_AUX = 0,
MSR_AREA_IA32_PQR_ASSOC,
MSR_AREA_IA32_PQR_ASSOC = 0,
MSR_AREA_COUNT,
};