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hv: cat: isolate hypervisor from rtvm

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Currently, the clos id of the cpu cores in vmx root mode is the same as non-root mode.
For RTVM, if hypervisor share the same clos id with non-root mode, the cacheline may
be polluted due to the hypervisor code execution when vmexit.

The patch adds hv_clos in vm_configurations.c
Hypervisor initializes clos setting according to hv_clos during physical cpu cores initialization.
For RTVM,  MSR auto load/store areas are used to switch different settings for VMX root/non-root
mode for RTVM.

Tracked-On: #2462
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
This commit is contained in:
Binbin Wu
2019-08-13 08:51:15 +00:00
committed by ACRN System Integration
parent 38ca8db19f
commit cd1ae7a89e
7 changed files with 42 additions and 13 deletions
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15
hypervisor/arch/x86/cat.c
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@@ -13,8 +13,11 @@
#include <logmsg.h>
#include <cat.h>
#include <board.h>
#include <vm_config.h>
#include <msr.h>
struct cat_hw_info cat_cap_info;
const uint16_t hv_clos = 0U;
int32_t init_cat_cap_info(void)
{
@@ -67,5 +70,17 @@ void setup_clos(uint16_t pcpu_id)
val = (uint64_t)platform_clos_array[i].clos_mask;
msr_write_pcpu(msr_index, val, pcpu_id);
}
/* set hypervisor CAT clos */
msr_write_pcpu(MSR_IA32_PQR_ASSOC, clos2prq_msr(hv_clos), pcpu_id);
}
}
uint64_t clos2prq_msr(uint16_t clos)
{
uint64_t prq_assoc;
prq_assoc = msr_read(MSR_IA32_PQR_ASSOC);
prq_assoc = (prq_assoc & 0xffffffffUL) | ((uint64_t)clos << 32U);
return prq_assoc;
}