hv: cat: isolate hypervisor from rtvm

Currently, the clos id of the cpu cores in vmx root mode is the same as non-root mode.
For RTVM, if hypervisor share the same clos id with non-root mode, the cacheline may
be polluted due to the hypervisor code execution when vmexit.

The patch adds hv_clos in vm_configurations.c
Hypervisor initializes clos setting according to hv_clos during physical cpu cores initialization.
For RTVM,  MSR auto load/store areas are used to switch different settings for VMX root/non-root
mode for RTVM.

Tracked-On: #2462
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
This commit is contained in:
Binbin Wu
2019-08-13 08:51:15 +00:00
committed by ACRN System Integration
parent 38ca8db19f
commit cd1ae7a89e
7 changed files with 42 additions and 13 deletions

View File

@@ -19,11 +19,13 @@ struct cat_hw_info {
};
extern struct cat_hw_info cat_cap_info;
extern const uint16_t hv_clos;
void setup_clos(uint16_t pcpu_id);
#define CAT_RESID_L3 1U
#define CAT_RESID_L2 2U
int32_t init_cat_cap_info(void);
uint64_t clos2prq_msr(uint16_t clos);
#endif /* CAT_H */

View File

@@ -270,6 +270,9 @@ void cpu_dead(void);
void trampoline_start16(void);
void load_pcpu_state_data(void);
void init_pcpu_pre(bool is_bsp);
/* The function should be called on the same CPU core as specified by pcpu_id,
* hereby, pcpu_id is actually the current physcial cpu id.
*/
void init_pcpu_post(uint16_t pcpu_id);
bool start_pcpus(uint64_t mask);
void wait_pcpus_offline(uint64_t mask);

View File

@@ -281,12 +281,14 @@ struct msr_store_entry {
enum {
MSR_AREA_TSC_AUX = 0,
MSR_AREA_IA32_PQR_ASSOC,
MSR_AREA_COUNT,
};
struct msr_store_area {
struct msr_store_entry guest[MSR_AREA_COUNT];
struct msr_store_entry host[MSR_AREA_COUNT];
uint32_t count; /* actual count of entries to be loaded/restored during VMEntry/VMExit */
};
struct acrn_vcpu_arch {