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hypervisor: Fix spelling and grammar mistakes.

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Tracked-On: #8533
Signed-off-by: Muhammad Qasim Abdul Majeed <qasim.majeed20@gmail.com>
This commit is contained in:
Muhammad Qasim Abdul Majeed 2023-10-23 12:42:27 +05:00 committed by acrnsi-robot
parent 847d9fea14
commit ce96ef6bae
3 changed files with 5 additions and 5 deletions
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6
hypervisor/arch/x86/irq.c
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@ -40,10 +40,10 @@ static struct {
}; };
/* /*
* alloc an vectror and bind it to irq * allocate a vector and bind it to irq
* for legacy_irq (irq num < 16) and static mapped ones, do nothing * for legacy_irq (irq num < 16) and static mapped ones, do nothing
* if mapping is correct. * if mapping is correct.
* retval: valid vector num on susccess, VECTOR_INVALID on failure. * retval: valid vector number on success, VECTOR_INVALID on failure.
*/ */
uint32_t alloc_irq_vector(uint32_t irq) uint32_t alloc_irq_vector(uint32_t irq)
{ {
@ -66,7 +66,7 @@ uint32_t alloc_irq_vector(uint32_t irq)
} }
} else { } else {
/* alloc a vector between: /* alloc a vector between:
* VECTOR_DYNAMIC_START ~ VECTOR_DYNAMC_END * VECTOR_DYNAMIC_START ~ VECTOR_DYNAMIC_END
*/ */
for (vr = VECTOR_DYNAMIC_START; for (vr = VECTOR_DYNAMIC_START;
vr <= VECTOR_DYNAMIC_END; vr++) { vr <= VECTOR_DYNAMIC_END; vr++) {

2
hypervisor/arch/x86/lapic.c
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@ -284,7 +284,7 @@ void send_single_init(uint16_t pcpu_id)
/* /*
* Intel SDM Vol3 23.8: * Intel SDM Vol3 23.8:
* The INIT signal is blocked whenever a logical processor is in VMX root operation. * The INIT signal is blocked whenever a logical processor is in VMX root operation.
* It is not blocked in VMX nonroot operation. Instead, INITs cause VM exits * It is not blocked in VMX non-root operation. Instead, INITs cause VM exits
*/ */
icr.value_32.hi_32 = per_cpu(lapic_id, pcpu_id); icr.value_32.hi_32 = per_cpu(lapic_id, pcpu_id);

2
hypervisor/arch/x86/mmu.c
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@ -298,7 +298,7 @@ void init_paging(void)
} }
/* /*
* set the paging-structure entries' U/S flag to supervisor-mode for hypervisor owned memroy. * set the paging-structure entries' U/S flag to supervisor-mode for hypervisor owned memory.
* (exclude the memory reserve for trusty) * (exclude the memory reserve for trusty)
* *
* Before the new PML4 take effect in enable_paging(), HPA->HVA is always 1:1 mapping, * Before the new PML4 take effect in enable_paging(), HPA->HVA is always 1:1 mapping,