Changing the mem_read* from macro to inline

To be consistant with inline function mem_write, modifying the
mem_read* and using inline function instead.

Signed-off-by: Yang, Yu-chu <yu-chu.yang@intel.com>
This commit is contained in:
Yang, Yu-chu
2018-07-03 18:05:29 -07:00
committed by lijinxia
parent 0419816574
commit cfca49d7c6
4 changed files with 25 additions and 11 deletions

View File

@@ -19,7 +19,7 @@ static uint64_t find_next_table(uint32_t table_offset, void *table_base)
uint64_t sub_table_addr = 0;
/* Read the table entry */
table_entry = MEM_READ64(table_base
table_entry = mem_read64(table_base
+ (table_offset * IA32E_COMM_ENTRY_SIZE));
/* If bit 7 is set, entry is not a subtable. */

View File

@@ -304,7 +304,7 @@ static uint32_t map_mem_region(void *vaddr, void *paddr,
/* Check to see if mapping should occur */
if (mapped_size != 0U) {
/* Get current table entry */
uint64_t entry = MEM_READ64(table_base + table_offset);
uint64_t entry = mem_read64(table_base + table_offset);
bool prev_entry_present = false;
bool mmu_need_invtlb = false;
@@ -487,7 +487,7 @@ static int get_table_entry(void *addr, void *table_base,
table_offset = fetch_page_table_offset(addr, table_level);
/* Read the table entry */
*table_entry = MEM_READ64(table_base + table_offset);
*table_entry = mem_read64(table_base + table_offset);
return 0;
}
@@ -515,7 +515,7 @@ static void *walk_paging_struct(void *addr, void *table_base,
/* See if we can skip the rest */
if (sub_table_addr != table_base) {
/* Read the table entry */
table_entry = MEM_READ64(table_base + table_offset);
table_entry = mem_read64(table_base + table_offset);
/* Check if EPT entry being created */
if (map_params->page_table_type == PTT_EPT) {

View File

@@ -129,7 +129,7 @@ static void create_secure_world_ept(struct vm *vm, uint64_t gpa_orig,
mem_write64(pml4_base, sworld_pml4e);
nworld_pml4e = MEM_READ64(HPA2HVA(vm->arch_vm.nworld_eptp));
nworld_pml4e = mem_read64(HPA2HVA(vm->arch_vm.nworld_eptp));
(void)memcpy_s(HPA2HVA(sworld_pml4e & IA32E_REF_MASK), CPU_PAGE_SIZE,
HPA2HVA(nworld_pml4e & IA32E_REF_MASK), CPU_PAGE_SIZE);