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Changing the mem_read* from macro to inline

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To be consistant with inline function mem_write, modifying the
mem_read* and using inline function instead.

Signed-off-by: Yang, Yu-chu <yu-chu.yang@intel.com>
This commit is contained in:
Yang, Yu-chu 2018-07-03 18:05:29 -07:00 committed by lijinxia
parent 0419816574
commit cfca49d7c6
4 changed files with 25 additions and 11 deletions
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2
hypervisor/arch/x86/ept.c
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@ -19,7 +19,7 @@ static uint64_t find_next_table(uint32_t table_offset, void *table_base)
uint64_t sub_table_addr = 0; uint64_t sub_table_addr = 0;
/* Read the table entry */ /* Read the table entry */
table_entry = MEM_READ64(table_base table_entry = mem_read64(table_base
+ (table_offset * IA32E_COMM_ENTRY_SIZE)); + (table_offset * IA32E_COMM_ENTRY_SIZE));
/* If bit 7 is set, entry is not a subtable. */ /* If bit 7 is set, entry is not a subtable. */

6
hypervisor/arch/x86/mmu.c
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@ -304,7 +304,7 @@ static uint32_t map_mem_region(void *vaddr, void *paddr,
/* Check to see if mapping should occur */ /* Check to see if mapping should occur */
if (mapped_size != 0U) { if (mapped_size != 0U) {
/* Get current table entry */ /* Get current table entry */
uint64_t entry = MEM_READ64(table_base + table_offset); uint64_t entry = mem_read64(table_base + table_offset);
bool prev_entry_present = false; bool prev_entry_present = false;
bool mmu_need_invtlb = false; bool mmu_need_invtlb = false;
@ -487,7 +487,7 @@ static int get_table_entry(void *addr, void *table_base,
table_offset = fetch_page_table_offset(addr, table_level); table_offset = fetch_page_table_offset(addr, table_level);
/* Read the table entry */ /* Read the table entry */
*table_entry = MEM_READ64(table_base + table_offset); *table_entry = mem_read64(table_base + table_offset);
return 0; return 0;
} }
@ -515,7 +515,7 @@ static void *walk_paging_struct(void *addr, void *table_base,
/* See if we can skip the rest */ /* See if we can skip the rest */
if (sub_table_addr != table_base) { if (sub_table_addr != table_base) {
/* Read the table entry */ /* Read the table entry */
table_entry = MEM_READ64(table_base + table_offset); table_entry = mem_read64(table_base + table_offset);
/* Check if EPT entry being created */ /* Check if EPT entry being created */
if (map_params->page_table_type == PTT_EPT) { if (map_params->page_table_type == PTT_EPT) {

2
hypervisor/arch/x86/trusty.c
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@ -129,7 +129,7 @@ static void create_secure_world_ept(struct vm *vm, uint64_t gpa_orig,
mem_write64(pml4_base, sworld_pml4e); mem_write64(pml4_base, sworld_pml4e);
nworld_pml4e = MEM_READ64(HPA2HVA(vm->arch_vm.nworld_eptp)); nworld_pml4e = mem_read64(HPA2HVA(vm->arch_vm.nworld_eptp));
(void)memcpy_s(HPA2HVA(sworld_pml4e & IA32E_REF_MASK), CPU_PAGE_SIZE, (void)memcpy_s(HPA2HVA(sworld_pml4e & IA32E_REF_MASK), CPU_PAGE_SIZE,
HPA2HVA(nworld_pml4e & IA32E_REF_MASK), CPU_PAGE_SIZE); HPA2HVA(nworld_pml4e & IA32E_REF_MASK), CPU_PAGE_SIZE);

26
hypervisor/include/arch/x86/mmu.h
View File

@ -257,13 +257,27 @@ enum _page_table_present {
#define PAGE_SIZE_2M MEM_2M #define PAGE_SIZE_2M MEM_2M
#define PAGE_SIZE_1G MEM_1G #define PAGE_SIZE_1G MEM_1G
/* Macros for reading memory */ /* Inline functions for reading/writing memory */
#define MEM_READ8(addr) (*(volatile uint8_t *)(addr)) static inline uint8_t mem_read8(void *addr)
#define MEM_READ16(addr) (*(volatile uint16_t *)(addr)) {
#define MEM_READ32(addr) (*(volatile uint32_t *)(addr)) return *(volatile uint8_t *)(addr);
#define MEM_READ64(addr) (*(volatile uint64_t *)(addr)) }
static inline uint16_t mem_read16(void *addr)
{
return *(volatile uint16_t *)(addr);
}
static inline uint32_t mem_read32(void *addr)
{
return *(volatile uint32_t *)(addr);
}
static inline uint64_t mem_read64(void *addr)
{
return *(volatile uint64_t *)(addr);
}
/* Inline functions for writing memory */
static inline void mem_write8(void *addr, uint8_t data) static inline void mem_write8(void *addr, uint8_t data)
{ {
*(volatile uint8_t *)(addr) = (uint8_t)(data); *(volatile uint8_t *)(addr) = (uint8_t)(data);