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retpoline: add indirect thunk support

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for gcc version > 7.3, enable CONFIG_RETPOLINE

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
This commit is contained in:
Jason Chen CJ
2018-03-12 20:57:44 +08:00
committed by Jack Ren
parent c244e8b5a3
commit d14a7dbdd2
5 changed files with 75 additions and 2 deletions
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61
hypervisor/arch/x86/retpoline-thunk.S Normal file
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/*
* Copyright (C) 2018 Intel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
.macro retpoline_thunk reg:req
.align 8
.global __x86_indirect_thunk_\reg
__x86_indirect_thunk_\reg:
call 22f
11:
pause
jmp 11b
22:
mov %\reg, (%rsp)
ret
.endm
.section .retpoline_thunk, "ax"
retpoline_thunk rax
retpoline_thunk rbx
retpoline_thunk rcx
retpoline_thunk rdx
retpoline_thunk rdi
retpoline_thunk rsi
retpoline_thunk rbp
retpoline_thunk r8
retpoline_thunk r9
retpoline_thunk r10
retpoline_thunk r11
retpoline_thunk r12
retpoline_thunk r13
retpoline_thunk r14
retpoline_thunk r15