hv: correct the way to check if a MSR is a fixed MTRR register

The fixed MTRR MSR numbers are not contiguous, so it's not correct
to justify it by checking if it falls in certain range.

This patch fixes this issue by removing is_fixed_range_mtrr()
and use get_index_of_fixed_mtrr() to loop fixed_mtrr_map[]
and compare individual MSR values.

Also removed the unused function get_subrange_end_of_fixed_mtrr()

Signed-off-by: Zide Chen <zide.chen@intel.com>
This commit is contained in:
Zide Chen 2018-07-20 09:01:56 -07:00 committed by lijinxia
parent bd6979925c
commit d5be735978

View File

@ -23,6 +23,7 @@ struct fixed_range_mtrr_maps {
}; };
#define MAX_FIXED_RANGE_ADDR 0x100000UL #define MAX_FIXED_RANGE_ADDR 0x100000UL
#define FIXED_MTRR_INVALID_INDEX -1U
static struct fixed_range_mtrr_maps fixed_mtrr_map[FIXED_RANGE_MTRR_NUM] = { static struct fixed_range_mtrr_maps fixed_mtrr_map[FIXED_RANGE_MTRR_NUM] = {
{ MSR_IA32_MTRR_FIX64K_00000, 0x0U, 0x10000U }, { MSR_IA32_MTRR_FIX64K_00000, 0x0U, 0x10000U },
{ MSR_IA32_MTRR_FIX16K_80000, 0x80000U, 0x4000U }, { MSR_IA32_MTRR_FIX16K_80000, 0x80000U, 0x4000U },
@ -37,21 +38,16 @@ static struct fixed_range_mtrr_maps fixed_mtrr_map[FIXED_RANGE_MTRR_NUM] = {
{ MSR_IA32_MTRR_FIX4K_F8000, 0xF8000U, 0x1000U }, { MSR_IA32_MTRR_FIX4K_F8000, 0xF8000U, 0x1000U },
}; };
static bool is_fixed_range_mtrr(uint32_t msr)
{
return (msr >= fixed_mtrr_map[0].msr)
&& (msr <= fixed_mtrr_map[FIXED_RANGE_MTRR_NUM - 1U].msr);
}
static uint32_t get_index_of_fixed_mtrr(uint32_t msr) static uint32_t get_index_of_fixed_mtrr(uint32_t msr)
{ {
uint32_t i; uint32_t i;
for (i = 0U; i < FIXED_RANGE_MTRR_NUM; i++) { for (i = 0U; i < FIXED_RANGE_MTRR_NUM; i++) {
if (fixed_mtrr_map[i].msr == msr) if (fixed_mtrr_map[i].msr == msr) {
break; return i;
}
} }
return i; return FIXED_MTRR_INVALID_INDEX;
} }
static uint32_t static uint32_t
@ -67,13 +63,6 @@ get_subrange_start_of_fixed_mtrr(uint32_t index, uint32_t subrange_id)
get_subrange_size_of_fixed_mtrr(index)); get_subrange_size_of_fixed_mtrr(index));
} }
static uint32_t
get_subrange_end_of_fixed_mtrr(uint32_t index, uint32_t subrange_id)
{
return (get_subrange_start_of_fixed_mtrr(index, subrange_id) +
get_subrange_size_of_fixed_mtrr(index) - 1U);
}
static inline bool is_mtrr_enabled(struct vcpu *vcpu) static inline bool is_mtrr_enabled(struct vcpu *vcpu)
{ {
return vcpu->mtrr.def_type.bits.enable; return vcpu->mtrr.def_type.bits.enable;
@ -201,6 +190,8 @@ static void update_ept_mem_type(struct vcpu *vcpu)
void mtrr_wrmsr(struct vcpu *vcpu, uint32_t msr, uint64_t value) void mtrr_wrmsr(struct vcpu *vcpu, uint32_t msr, uint64_t value)
{ {
uint32_t index;
if (msr == MSR_IA32_MTRR_DEF_TYPE) { if (msr == MSR_IA32_MTRR_DEF_TYPE) {
if (vcpu->mtrr.def_type.value != value) { if (vcpu->mtrr.def_type.value != value) {
vcpu->mtrr.def_type.value = value; vcpu->mtrr.def_type.value = value;
@ -230,25 +221,34 @@ void mtrr_wrmsr(struct vcpu *vcpu, uint32_t msr, uint64_t value)
*/ */
update_ept_mem_type(vcpu); update_ept_mem_type(vcpu);
} }
} else if (is_fixed_range_mtrr(msr)) } else {
vcpu->mtrr.fixed_range[get_index_of_fixed_mtrr(msr)].value = value; index = get_index_of_fixed_mtrr(msr);
else if (index != FIXED_MTRR_INVALID_INDEX) {
pr_err("Write to unexpected MSR: 0x%x", msr); vcpu->mtrr.fixed_range[index].value = value;
} else {
pr_err("Write to unexpected MSR: 0x%x", msr);
}
}
} }
uint64_t mtrr_rdmsr(struct vcpu *vcpu, uint32_t msr) uint64_t mtrr_rdmsr(struct vcpu *vcpu, uint32_t msr)
{ {
struct mtrr_state *mtrr = &vcpu->mtrr; struct mtrr_state *mtrr = &vcpu->mtrr;
uint64_t ret = 0UL; uint64_t ret = 0UL;
uint32_t index;
if (msr == MSR_IA32_MTRR_CAP) if (msr == MSR_IA32_MTRR_CAP) {
ret = mtrr->cap.value; ret = mtrr->cap.value;
else if (msr == MSR_IA32_MTRR_DEF_TYPE) } else if (msr == MSR_IA32_MTRR_DEF_TYPE) {
ret = mtrr->def_type.value; ret = mtrr->def_type.value;
else if (is_fixed_range_mtrr(msr)) } else {
ret = mtrr->fixed_range[get_index_of_fixed_mtrr(msr)].value; index = get_index_of_fixed_mtrr(msr);
else if (index != FIXED_MTRR_INVALID_INDEX) {
pr_err("read unexpected MSR: 0x%x", msr); ret = mtrr->fixed_range[index].value;
} else {
pr_err("read unexpected MSR: 0x%x", msr);
}
}
return ret; return ret;
} }