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hv: mmu: use get/set_pgentry to get/set page table entry

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And remove mem_read/write_xx API.

Tracked-On: #1124

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
This commit is contained in:
Li, Fei1 2018-08-24 10:37:31 +08:00 committed by lijinxia
parent 7f9befb643
commit d67eefb012
2 changed files with 7 additions and 53 deletions
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14
hypervisor/arch/x86/trusty.c
View File

@ -106,21 +106,21 @@ static void create_secure_world_ept(struct vm *vm, uint64_t gpa_orig,
*/ */
sub_table_addr = alloc_paging_struct(); sub_table_addr = alloc_paging_struct();
sworld_pml4e = HVA2HPA(sub_table_addr) | table_present; sworld_pml4e = HVA2HPA(sub_table_addr) | table_present;
mem_write64(pml4_base, sworld_pml4e); set_pgentry((uint64_t *)pml4_base, sworld_pml4e);
nworld_pml4e = mem_read64(vm->arch_vm.nworld_eptp); nworld_pml4e = get_pgentry((uint64_t *)vm->arch_vm.nworld_eptp);
/* /*
* copy PTPDEs from normal world EPT to secure world EPT, * copy PTPDEs from normal world EPT to secure world EPT,
* and remove execute access attribute in these entries * and remove execute access attribute in these entries
*/ */
dest_pdpte_p = HPA2HVA(sworld_pml4e & IA32E_REF_MASK); dest_pdpte_p = pml4e_page_vaddr(sworld_pml4e);
src_pdpte_p = HPA2HVA(nworld_pml4e & IA32E_REF_MASK); src_pdpte_p = pml4e_page_vaddr(nworld_pml4e);
for (i = 0U; i < IA32E_NUM_ENTRIES - 1; i++) { for (i = 0U; i < PTRS_PER_PDPTE - 1; i++) {
pdpte = mem_read64(src_pdpte_p); pdpte = get_pgentry(src_pdpte_p);
if ((pdpte & table_present) != 0UL) { if ((pdpte & table_present) != 0UL) {
pdpte &= ~EPT_EXE; pdpte &= ~EPT_EXE;
mem_write64(dest_pdpte_p, pdpte); set_pgentry(dest_pdpte_p, pdpte);
} }
src_pdpte_p++; src_pdpte_p++;
dest_pdpte_p++; dest_pdpte_p++;

46
hypervisor/include/arch/x86/mmu.h
View File

@ -40,7 +40,6 @@
#define CACHE_LINE_SIZE 64U #define CACHE_LINE_SIZE 64U
/* IA32E Paging constants */ /* IA32E Paging constants */
#define IA32E_NUM_ENTRIES 512U
#define IA32E_REF_MASK \ #define IA32E_REF_MASK \
(boot_cpu_data.physical_address_mask) (boot_cpu_data.physical_address_mask)
@ -66,51 +65,6 @@ enum _page_table_level {
#define PAGE_SIZE_2M MEM_2M #define PAGE_SIZE_2M MEM_2M
#define PAGE_SIZE_1G MEM_1G #define PAGE_SIZE_1G MEM_1G
/* Inline functions for reading/writing memory */
static inline uint8_t mem_read8(const void *addr)
{
return *(volatile uint8_t *)(addr);
}
static inline uint16_t mem_read16(const void *addr)
{
return *(volatile uint16_t *)(addr);
}
static inline uint32_t mem_read32(const void *addr)
{
return *(volatile uint32_t *)(addr);
}
static inline uint64_t mem_read64(const void *addr)
{
return *(volatile uint64_t *)(addr);
}
static inline void mem_write8(const void *addr, uint8_t data)
{
volatile uint8_t *addr8 = (volatile uint8_t *)addr;
*addr8 = data;
}
static inline void mem_write16(void *addr, uint16_t data)
{
volatile uint16_t *addr16 = (volatile uint16_t *)addr;
*addr16 = data;
}
static inline void mem_write32(void *addr, uint32_t data)
{
volatile uint32_t *addr32 = (volatile uint32_t *)addr;
*addr32 = data;
}
static inline void mem_write64(void *addr, uint64_t data)
{
volatile uint64_t *addr64 = (volatile uint64_t *)addr;
*addr64 = data;
}
uint64_t get_paging_pml4(void); uint64_t get_paging_pml4(void);
void *alloc_paging_struct(void); void *alloc_paging_struct(void);
void free_paging_struct(void *ptr); void free_paging_struct(void *ptr);