github/acrn-hypervisor
1
0
Fork 0
mirror of https://github.com/projectacrn/acrn-hypervisor.git synced 2025-06-19 20:22:46 +00:00
Code Issues Projects Releases Wiki Activity

hv: refine naming

Browse Source 
Change enable_vf/disable_vf to create_vfs/disable_vfs
Change base member of pci_vbar to base_gpa

Tracked-On: #4433

Signed-off-by: Yuan Liu <yuan1.liu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
This commit is contained in:
Yuan Liu 2020-03-09 22:40:11 +08:00 committed by wenlingz
parent 08ed45f4b4
commit d8a19f9978
4 changed files with 21 additions and 21 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

26
hypervisor/dm/vpci/pci_pt.c
View File

@ -74,15 +74,15 @@ void vdev_pt_map_msix(struct pci_vdev *vdev, bool hold_lock)
struct acrn_vm *vm = vdev->vpci->vm; struct acrn_vm *vm = vdev->vpci->vm;
vbar = &vdev->vbars[vdev->msix.table_bar]; vbar = &vdev->vbars[vdev->msix.table_bar];
if (vbar->base != 0UL) { if (vbar->base_gpa != 0UL) {
addr_lo = vbar->base + msix->table_offset; addr_lo = vbar->base_gpa + msix->table_offset;
addr_hi = addr_lo + (msix->table_count * MSIX_TABLE_ENTRY_SIZE); addr_hi = addr_lo + (msix->table_count * MSIX_TABLE_ENTRY_SIZE);
addr_lo = round_page_down(addr_lo); addr_lo = round_page_down(addr_lo);
addr_hi = round_page_up(addr_hi); addr_hi = round_page_up(addr_hi);
register_mmio_emulation_handler(vm, vmsix_handle_table_mmio_access, register_mmio_emulation_handler(vm, vmsix_handle_table_mmio_access,
addr_lo, addr_hi, vdev, hold_lock); addr_lo, addr_hi, vdev, hold_lock);
ept_del_mr(vm, (uint64_t *)vm->arch_vm.nworld_eptp, addr_lo, addr_hi - addr_lo); ept_del_mr(vm, (uint64_t *)vm->arch_vm.nworld_eptp, addr_lo, addr_hi - addr_lo);
msix->mmio_gpa = vbar->base; msix->mmio_gpa = vbar->base_gpa;
} }
} }
@ -98,9 +98,9 @@ static void vdev_pt_unmap_mem_vbar(struct pci_vdev *vdev, uint32_t idx)
vbar = &vdev->vbars[idx]; vbar = &vdev->vbars[idx];
if (vbar->base != 0UL) { if (vbar->base_gpa != 0UL) {
ept_del_mr(vm, (uint64_t *)(vm->arch_vm.nworld_eptp), ept_del_mr(vm, (uint64_t *)(vm->arch_vm.nworld_eptp),
vbar->base, /* GPA (old vbar) */ vbar->base_gpa, /* GPA (old vbar) */
vbar->size); vbar->size);
} }
@ -121,10 +121,10 @@ static void vdev_pt_map_mem_vbar(struct pci_vdev *vdev, uint32_t idx)
vbar = &vdev->vbars[idx]; vbar = &vdev->vbars[idx];
if (vbar->base != 0UL) { if (vbar->base_gpa != 0UL) {
ept_add_mr(vm, (uint64_t *)(vm->arch_vm.nworld_eptp), ept_add_mr(vm, (uint64_t *)(vm->arch_vm.nworld_eptp),
vbar->base_hpa, /* HPA (pbar) */ vbar->base_hpa, /* HPA (pbar) */
vbar->base, /* GPA (new vbar) */ vbar->base_gpa, /* GPA (new vbar) */
vbar->size, vbar->size,
EPT_WR | EPT_RD | EPT_UNCACHED); EPT_WR | EPT_RD | EPT_UNCACHED);
} }
@ -145,8 +145,8 @@ static void vdev_pt_allow_io_vbar(struct pci_vdev *vdev, uint32_t idx)
/* For SOS, all port IO access is allowed by default, so skip SOS here */ /* For SOS, all port IO access is allowed by default, so skip SOS here */
if (!is_sos_vm(vdev->vpci->vm)) { if (!is_sos_vm(vdev->vpci->vm)) {
struct pci_vbar *vbar = &vdev->vbars[idx]; struct pci_vbar *vbar = &vdev->vbars[idx];
if (vbar->base != 0UL) { if (vbar->base_gpa != 0UL) {
allow_guest_pio_access(vdev->vpci->vm, (uint16_t)vbar->base, (uint32_t)(vbar->size)); allow_guest_pio_access(vdev->vpci->vm, (uint16_t)vbar->base_gpa, (uint32_t)(vbar->size));
} }
} }
} }
@ -162,8 +162,8 @@ static void vdev_pt_deny_io_vbar(struct pci_vdev *vdev, uint32_t idx)
/* For SOS, all port IO access is allowed by default, so skip SOS here */ /* For SOS, all port IO access is allowed by default, so skip SOS here */
if (!is_sos_vm(vdev->vpci->vm)) { if (!is_sos_vm(vdev->vpci->vm)) {
struct pci_vbar *vbar = &vdev->vbars[idx]; struct pci_vbar *vbar = &vdev->vbars[idx];
if (vbar->base != 0UL) { if (vbar->base_gpa != 0UL) {
deny_guest_pio_access(vdev->vpci->vm, (uint16_t)(vbar->base), (uint32_t)(vbar->size)); deny_guest_pio_access(vdev->vpci->vm, (uint16_t)(vbar->base_gpa), (uint32_t)(vbar->size));
} }
} }
@ -186,7 +186,7 @@ void vdev_pt_write_vbar(struct pci_vdev *vdev, uint32_t idx, uint32_t val)
vdev_pt_allow_io_vbar(vdev, update_idx); vdev_pt_allow_io_vbar(vdev, update_idx);
} else { } else {
pci_vdev_write_vcfg(vdev, offset, 4U, val); pci_vdev_write_vcfg(vdev, offset, 4U, val);
vdev->vbars[update_idx].base = 0UL; vdev->vbars[update_idx].base_gpa = 0UL;
} }
break; break;
@ -204,7 +204,7 @@ void vdev_pt_write_vbar(struct pci_vdev *vdev, uint32_t idx, uint32_t val)
vdev_pt_map_mem_vbar(vdev, update_idx); vdev_pt_map_mem_vbar(vdev, update_idx);
} else { } else {
pci_vdev_write_vcfg(vdev, offset, 4U, val); pci_vdev_write_vcfg(vdev, offset, 4U, val);
vdev->vbars[update_idx].base = 0UL; vdev->vbars[update_idx].base_gpa = 0UL;
} }
break; break;
} }

2
hypervisor/dm/vpci/vdev.c
View File

@ -144,7 +144,7 @@ static void pci_vdev_update_vbar_base(struct pci_vdev *vdev, uint32_t idx)
base = 0UL; base = 0UL;
} }
vdev->vbars[idx].base = base; vdev->vbars[idx].base_gpa = base;
} }
void pci_vdev_write_vbar(struct pci_vdev *vdev, uint32_t idx, uint32_t val) void pci_vdev_write_vbar(struct pci_vdev *vdev, uint32_t idx, uint32_t val)

12
hypervisor/dm/vpci/vsriov.c
View File

@ -122,7 +122,7 @@ static void create_vf(struct pci_vdev *pf_vdev, union pci_bdf vf_bdf, uint16_t v
vf_vbar = &vf_vdev->vbars[bar_idx]; vf_vbar = &vf_vdev->vbars[bar_idx];
*vf_vbar = vf_vdev->phyfun->sriov.vbars[bar_idx]; *vf_vbar = vf_vdev->phyfun->sriov.vbars[bar_idx];
vf_vbar->base_hpa += (vf_vbar->size * vf_id); vf_vbar->base_hpa += (vf_vbar->size * vf_id);
vf_vbar->base = vf_vbar->base_hpa; vf_vbar->base_gpa = vf_vbar->base_hpa;
if (has_msix_cap(vf_vdev) && (bar_idx == vf_vdev->msix.table_bar)) { if (has_msix_cap(vf_vdev) && (bar_idx == vf_vdev->msix.table_bar)) {
vf_vdev->msix.mmio_hpa = vf_vbar->base_hpa; vf_vdev->msix.mmio_hpa = vf_vbar->base_hpa;
vf_vdev->msix.mmio_size = vf_vbar->size; vf_vdev->msix.mmio_size = vf_vbar->size;
@ -145,7 +145,7 @@ static void create_vf(struct pci_vdev *pf_vdev, union pci_bdf vf_bdf, uint16_t v
* @pre is_vf_enabled(pf_dev) == true * @pre is_vf_enabled(pf_dev) == true
* @Application constraints: PCIR_SRIOV_NUMVFS register value cannot be 0 if VF_ENABLE is set. * @Application constraints: PCIR_SRIOV_NUMVFS register value cannot be 0 if VF_ENABLE is set.
*/ */
static void enable_vf(struct pci_vdev *pf_vdev) static void enable_vfs(struct pci_vdev *pf_vdev)
{ {
union pci_bdf vf_bdf; union pci_bdf vf_bdf;
uint16_t idx; uint16_t idx;
@ -225,7 +225,7 @@ static void enable_vf(struct pci_vdev *pf_vdev)
/** /**
* @pre pf_vdev != NULL * @pre pf_vdev != NULL
*/ */
static void disable_vf(struct pci_vdev *pf_vdev) static void disable_vfs(struct pci_vdev *pf_vdev)
{ {
uint16_t idx, num_vfs, stride, first; uint16_t idx, num_vfs, stride, first;
struct pci_vdev *vf_vdev; struct pci_vdev *vf_vdev;
@ -296,14 +296,14 @@ void write_sriov_cap_reg(struct pci_vdev *vdev, uint32_t offset, uint32_t bytes,
if (enable != is_vf_enabled(vdev)) { if (enable != is_vf_enabled(vdev)) {
if (enable) { if (enable) {
/* /*
* set VF_ENABLE to PF physical device before enable_vf * set VF_ENABLE to PF physical device before enable_vfs
* since need to ask hardware to create VF physical * since need to ask hardware to create VF physical
* devices firstly * devices firstly
*/ */
pci_pdev_write_cfg(vdev->pdev->bdf, offset, bytes, val); pci_pdev_write_cfg(vdev->pdev->bdf, offset, bytes, val);
enable_vf(vdev); enable_vfs(vdev);
} else { } else {
disable_vf(vdev); disable_vfs(vdev);
pci_pdev_write_cfg(vdev->pdev->bdf, offset, bytes, val); pci_pdev_write_cfg(vdev->pdev->bdf, offset, bytes, val);
} }
} else { } else {

2
hypervisor/include/dm/vpci.h
View File

@ -37,7 +37,7 @@
struct pci_vbar { struct pci_vbar {
enum pci_bar_type type; enum pci_bar_type type;
uint64_t size; /* BAR size */ uint64_t size; /* BAR size */
uint64_t base; /* BAR guest physical address */ uint64_t base_gpa; /* BAR guest physical address */
uint64_t base_hpa; /* BAR host physical address */ uint64_t base_hpa; /* BAR host physical address */
uint32_t fixed; /* BAR fix memory type encoding */ uint32_t fixed; /* BAR fix memory type encoding */
uint32_t mask; /* BAR size mask */ uint32_t mask; /* BAR size mask */