hv: fix integer violations

fix the following integer violations:
1. Signed/unsigned conversion without cast
2. Literal value requires a U suffix
3. Implicit conversion of underlying type

v3 -> v4:
 * change the type of npk_loglevel/mem_loglevel/console_loglevel
   from uint32_t to uint16_t

v2 -> v3:
 * discard the return value of update_ept
 * discard changes related to npk loglevel

v1 -> v2:
 * remove the unnecessary changes related to the false positive
   issues caused by scanning tool
 * change the type of the local variable 'vlapic_id' from uint8_t
   to uint32_t in function 'vlapic_build_id'
 * change the type of the struct member 'flags' in shared_buf from
   uint64_t to uint32_t

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
This commit is contained in:
Shiqing Gao
2018-11-09 11:39:18 +08:00
committed by wenlingz
parent 7e6d0a2176
commit d97224a4b5
17 changed files with 68 additions and 72 deletions

View File

@@ -598,7 +598,7 @@ static void activate_physical_ioapic(struct acrn_vm *vm,
/* build physical IOAPIC RTE */
rte = ptdev_build_physical_rte(vm, entry);
intr_mask = (rte.full & IOAPIC_RTE_INTMASK);
intr_mask = (uint32_t)(rte.full & IOAPIC_RTE_INTMASK);
/* update irq trigger mode according to info in guest */
if ((rte.full & IOAPIC_RTE_TRGRMOD) == IOAPIC_RTE_TRGRLVL) {

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@@ -2213,7 +2213,7 @@ static int instr_check_gva(struct acrn_vcpu *vcpu, struct instr_emul_ctxt *emul_
segbase = desc.base;
}
gva = segbase + base + vie->scale * idx + vie->displacement;
gva = segbase + base + (uint64_t)vie->scale * idx + (uint64_t)vie->displacement;
if (vie_canonical_check(cpu_mode, gva) != 0) {
if (seg == CPU_REG_SS) {

View File

@@ -164,8 +164,7 @@ static inline uint32_t
vlapic_build_id(const struct acrn_vlapic *vlapic)
{
const struct acrn_vcpu *vcpu = vlapic->vcpu;
uint8_t vlapic_id;
uint32_t lapic_regs_id;
uint32_t vlapic_id, lapic_regs_id;
#ifdef CONFIG_PARTITION_MODE
/*
@@ -179,14 +178,14 @@ vlapic_build_id(const struct acrn_vlapic *vlapic)
/* Get APIC ID sequence format from cpu_storage */
vlapic_id = per_cpu(lapic_id, vcpu->vcpu_id);
} else {
vlapic_id = (uint8_t)vcpu->vcpu_id;
vlapic_id = (uint32_t)vcpu->vcpu_id;
}
#endif
if (is_x2apic_enabled(vlapic)) {
lapic_regs_id = vlapic_id;
} else {
lapic_regs_id = (uint32_t)vlapic_id << APIC_ID_SHIFT;
lapic_regs_id = vlapic_id << APIC_ID_SHIFT;
}
dev_dbg(ACRN_DBG_LAPIC, "vlapic APIC PAGE ID : 0x%08x", lapic_regs_id);

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@@ -242,7 +242,7 @@ int start_vm(struct acrn_vm *vm)
*/
int reset_vm(struct acrn_vm *vm)
{
int i;
uint16_t i;
struct acrn_vcpu *vcpu = NULL;
if (vm->state != VM_PAUSED) {

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@@ -191,7 +191,7 @@ int rdmsr_vmexit_handler(struct acrn_vcpu *vcpu)
uint64_t v = 0UL;
/* Read the msr value */
msr = vcpu_get_gpreg(vcpu, CPU_REG_RCX);
msr = (uint32_t)vcpu_get_gpreg(vcpu, CPU_REG_RCX);
/* Do the required processing for each msr case */
switch (msr) {

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@@ -443,10 +443,10 @@ static void deny_guest_pio_access(struct acrn_vm *vm, uint16_t port_address,
void setup_io_bitmap(struct acrn_vm *vm)
{
if (is_vm0(vm)) {
(void)memset(vm->arch_vm.io_bitmap, 0x00U, CPU_PAGE_SIZE * 2);
(void)memset(vm->arch_vm.io_bitmap, 0x00U, CPU_PAGE_SIZE * 2U);
} else {
/* block all IO port access from Guest */
(void)memset(vm->arch_vm.io_bitmap, 0xFFU, CPU_PAGE_SIZE * 2);
(void)memset(vm->arch_vm.io_bitmap, 0xFFU, CPU_PAGE_SIZE * 2U);
}
}

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@@ -46,7 +46,7 @@ uint32_t alloc_irq_num(uint32_t req_irq)
spinlock_irqsave_obtain(&irq_alloc_spinlock, &rflags);
if (irq == IRQ_INVALID) {
/* if no valid irq num given, find a free one */
irq = ffz64_ex(irq_alloc_bitmap, NR_IRQS);
irq = (uint32_t)ffz64_ex(irq_alloc_bitmap, NR_IRQS);
}
if (irq >= NR_IRQS) {

View File

@@ -125,7 +125,7 @@ void init_mtrr(struct acrn_vcpu *vcpu)
}
}
static uint32_t update_ept(struct acrn_vm *vm, uint64_t start,
static void update_ept(struct acrn_vm *vm, uint64_t start,
uint64_t size, uint8_t type)
{
uint64_t attr;
@@ -149,9 +149,7 @@ static uint32_t update_ept(struct acrn_vm *vm, uint64_t start,
break;
}
ept_mr_modify(vm, (uint64_t *)vm->arch_vm.nworld_eptp,
start, size, attr, EPT_MT_MASK);
return attr;
ept_mr_modify(vm, (uint64_t *)vm->arch_vm.nworld_eptp, start, size, attr, EPT_MT_MASK);
}
static void update_ept_mem_type(const struct acrn_vcpu *vcpu)
@@ -166,8 +164,7 @@ static void update_ept_mem_type(const struct acrn_vcpu *vcpu)
* - when def_type.FE is clear, MTRRdefType.type is applied
*/
if (!is_mtrr_enabled(vcpu) || !is_fixed_range_mtrr_enabled(vcpu)) {
(void)update_ept(vcpu->vm, 0U, MAX_FIXED_RANGE_ADDR,
get_default_memory_type(vcpu));
update_ept(vcpu->vm, 0U, MAX_FIXED_RANGE_ADDR, get_default_memory_type(vcpu));
return;
}
@@ -182,14 +179,14 @@ static void update_ept_mem_type(const struct acrn_vcpu *vcpu)
if (type == vcpu->mtrr.fixed_range[i].type[j]) {
size += get_subrange_size_of_fixed_mtrr(i);
} else {
(void)update_ept(vcpu->vm, start, size, type);
update_ept(vcpu->vm, start, size, type);
type = vcpu->mtrr.fixed_range[i].type[j];
start = get_subrange_start_of_fixed_mtrr(i, j);
size = get_subrange_size_of_fixed_mtrr(i);
}
}
(void)update_ept(vcpu->vm, start, size, type);
update_ept(vcpu->vm, start, size, type);
}
}