mirror of
https://github.com/projectacrn/acrn-hypervisor.git
synced 2025-09-21 16:57:20 +00:00
hv: fix integer violations
fix the following integer violations: 1. Signed/unsigned conversion without cast 2. Literal value requires a U suffix 3. Implicit conversion of underlying type v3 -> v4: * change the type of npk_loglevel/mem_loglevel/console_loglevel from uint32_t to uint16_t v2 -> v3: * discard the return value of update_ept * discard changes related to npk loglevel v1 -> v2: * remove the unnecessary changes related to the false positive issues caused by scanning tool * change the type of the local variable 'vlapic_id' from uint8_t to uint32_t in function 'vlapic_build_id' * change the type of the struct member 'flags' in shared_buf from uint64_t to uint32_t Tracked-On: #861 Signed-off-by: Shiqing Gao <shiqing.gao@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
This commit is contained in:
@@ -598,7 +598,7 @@ static void activate_physical_ioapic(struct acrn_vm *vm,
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/* build physical IOAPIC RTE */
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rte = ptdev_build_physical_rte(vm, entry);
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intr_mask = (rte.full & IOAPIC_RTE_INTMASK);
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intr_mask = (uint32_t)(rte.full & IOAPIC_RTE_INTMASK);
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/* update irq trigger mode according to info in guest */
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if ((rte.full & IOAPIC_RTE_TRGRMOD) == IOAPIC_RTE_TRGRLVL) {
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@@ -2213,7 +2213,7 @@ static int instr_check_gva(struct acrn_vcpu *vcpu, struct instr_emul_ctxt *emul_
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segbase = desc.base;
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}
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gva = segbase + base + vie->scale * idx + vie->displacement;
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gva = segbase + base + (uint64_t)vie->scale * idx + (uint64_t)vie->displacement;
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if (vie_canonical_check(cpu_mode, gva) != 0) {
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if (seg == CPU_REG_SS) {
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@@ -164,8 +164,7 @@ static inline uint32_t
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vlapic_build_id(const struct acrn_vlapic *vlapic)
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{
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const struct acrn_vcpu *vcpu = vlapic->vcpu;
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uint8_t vlapic_id;
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uint32_t lapic_regs_id;
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uint32_t vlapic_id, lapic_regs_id;
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#ifdef CONFIG_PARTITION_MODE
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/*
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@@ -179,14 +178,14 @@ vlapic_build_id(const struct acrn_vlapic *vlapic)
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/* Get APIC ID sequence format from cpu_storage */
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vlapic_id = per_cpu(lapic_id, vcpu->vcpu_id);
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} else {
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vlapic_id = (uint8_t)vcpu->vcpu_id;
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vlapic_id = (uint32_t)vcpu->vcpu_id;
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}
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#endif
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if (is_x2apic_enabled(vlapic)) {
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lapic_regs_id = vlapic_id;
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} else {
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lapic_regs_id = (uint32_t)vlapic_id << APIC_ID_SHIFT;
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lapic_regs_id = vlapic_id << APIC_ID_SHIFT;
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}
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dev_dbg(ACRN_DBG_LAPIC, "vlapic APIC PAGE ID : 0x%08x", lapic_regs_id);
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@@ -242,7 +242,7 @@ int start_vm(struct acrn_vm *vm)
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*/
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int reset_vm(struct acrn_vm *vm)
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{
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int i;
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uint16_t i;
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struct acrn_vcpu *vcpu = NULL;
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if (vm->state != VM_PAUSED) {
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@@ -191,7 +191,7 @@ int rdmsr_vmexit_handler(struct acrn_vcpu *vcpu)
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uint64_t v = 0UL;
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/* Read the msr value */
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msr = vcpu_get_gpreg(vcpu, CPU_REG_RCX);
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msr = (uint32_t)vcpu_get_gpreg(vcpu, CPU_REG_RCX);
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/* Do the required processing for each msr case */
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switch (msr) {
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@@ -443,10 +443,10 @@ static void deny_guest_pio_access(struct acrn_vm *vm, uint16_t port_address,
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void setup_io_bitmap(struct acrn_vm *vm)
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{
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if (is_vm0(vm)) {
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(void)memset(vm->arch_vm.io_bitmap, 0x00U, CPU_PAGE_SIZE * 2);
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(void)memset(vm->arch_vm.io_bitmap, 0x00U, CPU_PAGE_SIZE * 2U);
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} else {
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/* block all IO port access from Guest */
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(void)memset(vm->arch_vm.io_bitmap, 0xFFU, CPU_PAGE_SIZE * 2);
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(void)memset(vm->arch_vm.io_bitmap, 0xFFU, CPU_PAGE_SIZE * 2U);
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}
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}
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@@ -46,7 +46,7 @@ uint32_t alloc_irq_num(uint32_t req_irq)
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spinlock_irqsave_obtain(&irq_alloc_spinlock, &rflags);
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if (irq == IRQ_INVALID) {
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/* if no valid irq num given, find a free one */
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irq = ffz64_ex(irq_alloc_bitmap, NR_IRQS);
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irq = (uint32_t)ffz64_ex(irq_alloc_bitmap, NR_IRQS);
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}
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if (irq >= NR_IRQS) {
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@@ -125,7 +125,7 @@ void init_mtrr(struct acrn_vcpu *vcpu)
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}
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}
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static uint32_t update_ept(struct acrn_vm *vm, uint64_t start,
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static void update_ept(struct acrn_vm *vm, uint64_t start,
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uint64_t size, uint8_t type)
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{
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uint64_t attr;
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@@ -149,9 +149,7 @@ static uint32_t update_ept(struct acrn_vm *vm, uint64_t start,
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break;
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}
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ept_mr_modify(vm, (uint64_t *)vm->arch_vm.nworld_eptp,
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start, size, attr, EPT_MT_MASK);
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return attr;
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ept_mr_modify(vm, (uint64_t *)vm->arch_vm.nworld_eptp, start, size, attr, EPT_MT_MASK);
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}
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static void update_ept_mem_type(const struct acrn_vcpu *vcpu)
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@@ -166,8 +164,7 @@ static void update_ept_mem_type(const struct acrn_vcpu *vcpu)
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* - when def_type.FE is clear, MTRRdefType.type is applied
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*/
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if (!is_mtrr_enabled(vcpu) || !is_fixed_range_mtrr_enabled(vcpu)) {
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(void)update_ept(vcpu->vm, 0U, MAX_FIXED_RANGE_ADDR,
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get_default_memory_type(vcpu));
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update_ept(vcpu->vm, 0U, MAX_FIXED_RANGE_ADDR, get_default_memory_type(vcpu));
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return;
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}
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@@ -182,14 +179,14 @@ static void update_ept_mem_type(const struct acrn_vcpu *vcpu)
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if (type == vcpu->mtrr.fixed_range[i].type[j]) {
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size += get_subrange_size_of_fixed_mtrr(i);
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} else {
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(void)update_ept(vcpu->vm, start, size, type);
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update_ept(vcpu->vm, start, size, type);
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type = vcpu->mtrr.fixed_range[i].type[j];
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start = get_subrange_start_of_fixed_mtrr(i, j);
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size = get_subrange_size_of_fixed_mtrr(i);
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}
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}
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(void)update_ept(vcpu->vm, start, size, type);
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update_ept(vcpu->vm, start, size, type);
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}
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}
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