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hv: remove corner case in ptirq_prepare_msix_remap

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ptirq_prepare_msix_remap was called no matter whether MSI/MSI-X was enabled or not
and it passed zero to input parameter virtual MSI/MSI-X data field to indicate
MSI/MSI-X was disabled. However, it barely did nothing on this case.
Now ptirq_prepare_msix_remap is called only when  MSI/MSI-X is enabled. It doesn't
need to check whether MSI/MSI-X is enabled or not by checking virtual MSI/MSI-X
data field.

Tracked-On: #3475
Signed-off-by: Li Fei1 <fei1.li@intel.com>
This commit is contained in:
Li Fei1 2019-11-21 18:42:49 +08:00 committed by wenlingz
parent c05d9f8086
commit da3ba68cb6
1 changed files with 34 additions and 39 deletions
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73
hypervisor/arch/x86/guest/assign.c
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@ -637,48 +637,43 @@ int32_t ptirq_prepare_msix_remap(struct acrn_vm *vm, uint16_t virt_bdf, uint16_t
if (entry != NULL) { if (entry != NULL) {
ret = 0; ret = 0;
if (is_entry_active(entry) && (info->vmsi_data.full == 0U)) { /* build physical config MSI, update to info->pmsi_xxx */
/* handle destroy case */ if (is_lapic_pt_configured(vm)) {
info->pmsi_data.full = 0U; enum vm_vlapic_state vlapic_state = check_vm_vlapic_state(vm);
} else { if (vlapic_state == VM_VLAPIC_X2APIC) {
/* build physical config MSI, update to info->pmsi_xxx */ /*
if (is_lapic_pt_configured(vm)) { * All the vCPUs are in x2APIC mode and LAPIC is Pass-through
enum vm_vlapic_state vlapic_state = check_vm_vlapic_state(vm); * Use guest vector to program the interrupt source
if (vlapic_state == VM_VLAPIC_X2APIC) { */
/* ptirq_build_physical_msi(vm, info, entry, (uint32_t)info->vmsi_data.bits.vector);
* All the vCPUs are in x2APIC mode and LAPIC is Pass-through } else if (vlapic_state == VM_VLAPIC_XAPIC) {
* Use guest vector to program the interrupt source /*
*/ * All the vCPUs are in xAPIC mode and LAPIC is emulated
ptirq_build_physical_msi(vm, info, entry, (uint32_t)info->vmsi_data.bits.vector); * Use host vector to program the interrupt source
} else if (vlapic_state == VM_VLAPIC_XAPIC) { */
/*
* All the vCPUs are in xAPIC mode and LAPIC is emulated
* Use host vector to program the interrupt source
*/
ptirq_build_physical_msi(vm, info, entry, irq_to_vector(entry->allocated_pirq));
} else if (vlapic_state == VM_VLAPIC_TRANSITION) {
/*
* vCPUs are in middle of transition, so do not program interrupt source
* TODO: Devices programmed during transistion do not work after transition
* as device is not programmed with interrupt info. Need to implement a
* method to get interrupts working after transition.
*/
ret = -EFAULT;
} else {
/* Do nothing for VM_VLAPIC_DISABLED */
ret = -EFAULT;
}
} else {
ptirq_build_physical_msi(vm, info, entry, irq_to_vector(entry->allocated_pirq)); ptirq_build_physical_msi(vm, info, entry, irq_to_vector(entry->allocated_pirq));
} else if (vlapic_state == VM_VLAPIC_TRANSITION) {
/*
* vCPUs are in middle of transition, so do not program interrupt source
* TODO: Devices programmed during transistion do not work after transition
* as device is not programmed with interrupt info. Need to implement a
* method to get interrupts working after transition.
*/
ret = -EFAULT;
} else {
/* Do nothing for VM_VLAPIC_DISABLED */
ret = -EFAULT;
} }
} else {
ptirq_build_physical_msi(vm, info, entry, irq_to_vector(entry->allocated_pirq));
}
if (ret == 0) { if (ret == 0) {
entry->msi = *info; entry->msi = *info;
vbdf.value = virt_bdf; vbdf.value = virt_bdf;
dev_dbg(ACRN_DBG_IRQ, "PCI %x:%x.%x MSI VR[%d] 0x%x->0x%x assigned to vm%d", dev_dbg(ACRN_DBG_IRQ, "PCI %x:%x.%x MSI VR[%d] 0x%x->0x%x assigned to vm%d",
vbdf.bits.b, vbdf.bits.d, vbdf.bits.f, entry_nr, info->vmsi_data.bits.vector, vbdf.bits.b, vbdf.bits.d, vbdf.bits.f, entry_nr, info->vmsi_data.bits.vector,
irq_to_vector(entry->allocated_pirq), entry->vm->vm_id); irq_to_vector(entry->allocated_pirq), entry->vm->vm_id);
}
} }
} }