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HV:treewide:Update return type for function fls64 and clz64

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Change the return type of function fls64 and clz64 as uint16_t;
When the input is zero, INVALID_ID_INDEX is returned;
Update temporary variable type and return value check of caller
when it call fls64 or clz64;
When input value is zero, clz64 returns 64 directly.

V1-->V2:
        INVALID_BIT_INDEX instead of INVALID_NUMBER;
        Partly revert apicv_pending_intr udpates;
        Add type conversion as needed;
        Coding style fixing.
V2-->V3:
        Correct type conversion;
        fls64 return INVALID_BIT_INDEX directly when
        the input value is zero.
V3-->V4:
        No updates for this part in PATCH V4.

Note: For instruction "bsrq", destination register value
      is undefined when source register value is zero.

Signed-off-by: Xiangyang Wu <xiangyang.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
This commit is contained in:
Xiangyang Wu
2018-07-02 13:58:03 +08:00
committed by lijinxia
parent 13d354e7a6
commit db01efa047
3 changed files with 20 additions and 16 deletions
Download Patch File Download Diff File Expand all files Collapse all files

21
hypervisor/include/lib/bits.h
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@@ -74,14 +74,15 @@ static inline uint16_t fls(uint32_t value)
return (uint16_t)ret;
}
static inline int fls64(unsigned long value)
static inline uint16_t fls64(uint64_t value)
{
int ret;
asm volatile("bsrq %1,%q0"
uint64_t ret = 0UL;
if (value == 0UL)
return (INVALID_BIT_INDEX);
asm volatile("bsrq %1,%0"
: "=r" (ret)
: "rm" (value), "0" (-1));
return ret;
: "rm" (value));
return (uint16_t)ret;
}
/**
@@ -152,9 +153,13 @@ static inline uint16_t clz(uint32_t value)
*
* @return The number of leading zeros in 'value'.
*/
static inline int clz64(unsigned long value)
static inline uint16_t clz64(uint64_t value)
{
return (63 - fls64(value));
if (value == 0UL)
return 64U;
else{
return (63U - fls64(value));
}
}
/*