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ACRN:DM:PCI: Add the emulation of PCI rom bar register for passthru device
The pci_reg 0x30 of PCI config_space is used to check whether the PCI rom bar is supported. When the PCI rom is supported for the device in guest vm, the 0x30 pci_reg is emulated and it can return the addr/enable bit. Tracked-On: #8175 Signed-off-by: Zhao Yakui <yakui.zhao@intel.com> Acked-by: Yu Wang <yu1.wang@intel.com>
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@ -841,6 +841,13 @@ passthru_init(struct vmctx *ctx, struct pci_vdev *dev, char *opts)
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passthru_gpu_dsm_opregion(ctx, ptdev, &pcidev, device);
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passthru_gpu_dsm_opregion(ctx, ptdev, &pcidev, device);
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}
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}
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if (ptdev->need_rombar) {
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/* When the rombar is enabled, the access to
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* pci 0x30 reg will be emulated in DM.
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* So this will provide one hint for hypervisor.
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*/
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pcidev.type = ACRN_PTDEV_QUIRK_ASSIGN;
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}
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pcidev.virt_bdf = PCI_BDF(dev->bus, dev->slot, dev->func);
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pcidev.virt_bdf = PCI_BDF(dev->bus, dev->slot, dev->func);
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pcidev.phys_bdf = ptdev->phys_bdf;
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pcidev.phys_bdf = ptdev->phys_bdf;
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for (idx = 0; idx <= PCI_BARMAX; idx++) {
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for (idx = 0; idx <= PCI_BARMAX; idx++) {
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@ -995,7 +1002,9 @@ passthru_cfgread(struct vmctx *ctx, int vcpu, struct pci_vdev *dev,
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{
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{
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struct passthru_dev *ptdev = dev->arg;
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struct passthru_dev *ptdev = dev->arg;
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if (ptdev->has_virt_pcicfg_regs && ptdev->has_virt_pcicfg_regs(coff))
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if (coff == PCIR_BIOS) {
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*rv = pci_get_cfgdata32(dev, coff);
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} else if (ptdev->has_virt_pcicfg_regs && ptdev->has_virt_pcicfg_regs(coff))
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*rv = pci_get_cfgdata32(dev, coff);
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*rv = pci_get_cfgdata32(dev, coff);
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else
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else
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*rv = read_config(ptdev->phys_dev, coff, bytes);
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*rv = read_config(ptdev->phys_dev, coff, bytes);
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@ -1008,9 +1017,33 @@ passthru_cfgwrite(struct vmctx *ctx, int vcpu, struct pci_vdev *dev,
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int coff, int bytes, uint32_t val)
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int coff, int bytes, uint32_t val)
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{
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{
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struct passthru_dev *ptdev = dev->arg;
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struct passthru_dev *ptdev = dev->arg;
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uint32_t bios_rom;
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if (!(ptdev->has_virt_pcicfg_regs && ptdev->has_virt_pcicfg_regs(coff)))
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if (coff == PCIR_BIOS) {
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write_config(ptdev->phys_dev, coff, bytes, val);
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if ((val & PCIM_BIOS_ADDR_MASK) == PCIM_BIOS_ADDR_MASK) {
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/* size is returned by read after writing 0xFFFFF800.
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* And format is ~(size - 1).
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*/
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bios_rom = (uint32_t) dev->bar[PCI_ROMBAR].size;
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bios_rom = ~(bios_rom - 1);
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pci_set_cfgdata32(dev, PCIR_BIOS, bios_rom);
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} else if (val == 0) {
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/* restore the zero if ROM_Bar is not supported */
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pci_set_cfgdata32(dev, PCIR_BIOS, val);
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} else {
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/* restore the original addr into PCI_ROM bar.
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* force to update the original addr as remapping is not supported.
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*/
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bios_rom = (uint32_t) dev->bar[PCI_ROMBAR].addr;
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pci_set_cfgdata32(dev, PCIR_BIOS, (bios_rom | PCIR_BIOS));
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pr_dbg("Restore %x into ROM of %d:%d.%d\n",
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val, dev->bus, dev->slot, dev->func);
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}
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} else {
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if (!(ptdev->has_virt_pcicfg_regs && ptdev->has_virt_pcicfg_regs(coff)))
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write_config(ptdev->phys_dev, coff, bytes, val);
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}
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return 0;
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return 0;
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}
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}
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