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hv: fix misrac violations in vcpi code

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Fixed the following violations:
- Widening cast on complex integer expression
- Casting operation to a pointer
- Static procedure is not explicitly called in code analysed

Tracked-On: #1568
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
This commit is contained in:
Zide Chen 2018-10-29 16:38:41 -07:00 committed by Xie, Nanlin
parent 5555a2f85d
commit dbe156e9f6
3 changed files with 22 additions and 22 deletions
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6
hypervisor/dm/vpci/msix.c
View File

@ -55,7 +55,7 @@ static int vmsix_remap_entry(struct pci_vdev *vdev, uint32_t index, bool enable)
info.vmsi_addr = vdev->msix.tables[index].addr; info.vmsi_addr = vdev->msix.tables[index].addr;
info.vmsi_data = (enable) ? vdev->msix.tables[index].data : 0U; info.vmsi_data = (enable) ? vdev->msix.tables[index].data : 0U;
ret = ptdev_msix_remap(vdev->vpci->vm, vdev->vbdf.value, index, &info); ret = ptdev_msix_remap(vdev->vpci->vm, vdev->vbdf.value, (uint16_t)index, &info);
if (ret != 0) { if (ret != 0) {
return ret; return ret;
} }
@ -222,7 +222,7 @@ static void vmsix_table_rw(struct pci_vdev *vdev, struct mmio_request *mmio, uin
if ((pci_vdev_read_cfg(vdev, vdev->msix.capoff + PCIR_MSIX_CTRL, 2U) & PCIM_MSIXCTRL_MSIX_ENABLE) if ((pci_vdev_read_cfg(vdev, vdev->msix.capoff + PCIR_MSIX_CTRL, 2U) & PCIM_MSIXCTRL_MSIX_ENABLE)
== PCIM_MSIXCTRL_MSIX_ENABLE) { == PCIM_MSIXCTRL_MSIX_ENABLE) {
if ((((entry->vector_control ^ vector_control) & PCIM_MSIX_VCTRL_MASK) != 0U) || message_changed) { if ((((entry->vector_control ^ vector_control) & PCIM_MSIX_VCTRL_MASK) != 0U) || message_changed) {
unmasked = ((entry->vector_control & PCIM_MSIX_VCTRL_MASK) == 0U); unmasked = ((entry->vector_control & PCIM_MSIX_VCTRL_MASK) == 0U);
(void)vmsix_remap_one_entry(vdev, index, unmasked); (void)vmsix_remap_one_entry(vdev, index, unmasked);
} }
@ -271,7 +271,7 @@ static void decode_msix_table_bar(struct pci_vdev *vdev)
} }
/* Get the base address */ /* Get the base address */
base = (uint64_t)(bar_lo & PCIM_BAR_MEM_BASE); base = (uint64_t)bar_lo & PCIM_BAR_MEM_BASE;
if ((bar_lo & PCIM_BAR_MEM_TYPE) == PCIM_BAR_MEM_64) { if ((bar_lo & PCIM_BAR_MEM_TYPE) == PCIM_BAR_MEM_64) {
bar_hi = pci_pdev_read_cfg(pbdf, pci_bar_offset(bir + 1U), 4U); bar_hi = pci_pdev_read_cfg(pbdf, pci_bar_offset(bir + 1U), 4U);
base |= ((uint64_t)bar_hi << 32U); base |= ((uint64_t)bar_hi << 32U);

30
hypervisor/dm/vpci/pci_priv.h
View File

@ -37,40 +37,34 @@ static inline bool in_range(uint32_t value, uint32_t lower, uint32_t len)
return ((value >= lower) && (value < (lower + len))); return ((value >= lower) && (value < (lower + len)));
} }
static inline uint8_t static inline uint8_t pci_vdev_read_cfg_u8(struct pci_vdev *vdev, uint32_t offset)
pci_vdev_read_cfg_u8(struct pci_vdev *vdev, uint32_t offset)
{ {
return (*(uint8_t *)(&vdev->cfgdata[0] + offset)); return vdev->cfgdata.data_8[offset];
} }
static inline uint16_t pci_vdev_read_cfg_u16(struct pci_vdev *vdev, static inline uint16_t pci_vdev_read_cfg_u16(struct pci_vdev *vdev, uint32_t offset)
uint32_t offset)
{ {
return (*(uint16_t *)(&vdev->cfgdata[0] + offset)); return vdev->cfgdata.data_16[offset >> 1U];
} }
static inline uint32_t pci_vdev_read_cfg_u32(struct pci_vdev *vdev, static inline uint32_t pci_vdev_read_cfg_u32(struct pci_vdev *vdev, uint32_t offset)
uint32_t offset)
{ {
return (*(uint32_t *)(&vdev->cfgdata[0] + offset)); return vdev->cfgdata.data_32[offset >> 2U];
} }
static inline void static inline void pci_vdev_write_cfg_u8(struct pci_vdev *vdev, uint32_t offset, uint8_t val)
pci_vdev_write_cfg_u8(struct pci_vdev *vdev, uint32_t offset, uint8_t val)
{ {
*(uint8_t *)(vdev->cfgdata + offset) = val; vdev->cfgdata.data_8[offset] = val;
} }
static inline void static inline void pci_vdev_write_cfg_u16(struct pci_vdev *vdev, uint32_t offset, uint16_t val)
pci_vdev_write_cfg_u16(struct pci_vdev *vdev, uint32_t offset, uint16_t val)
{ {
*(uint16_t *)(vdev->cfgdata + offset) = val; vdev->cfgdata.data_16[offset >> 1U] = val;
} }
static inline void static inline void pci_vdev_write_cfg_u32(struct pci_vdev *vdev, uint32_t offset, uint32_t val)
pci_vdev_write_cfg_u32(struct pci_vdev *vdev, uint32_t offset, uint32_t val)
{ {
*(uint32_t *)(vdev->cfgdata + offset) = val; vdev->cfgdata.data_32[offset >> 2U] = val;
} }
extern struct vpci_ops partition_mode_vpci_ops; extern struct vpci_ops partition_mode_vpci_ops;

8
hypervisor/include/dm/vpci.h
View File

@ -84,6 +84,12 @@ struct msix {
uint32_t table_count; uint32_t table_count;
}; };
union cfgdata {
uint8_t data_8[PCI_REGMAX + 1U];
uint16_t data_16[(PCI_REGMAX + 1U) >> 2U];
uint32_t data_32[(PCI_REGMAX + 1U) >> 4U];
};
struct pci_vdev { struct pci_vdev {
#ifndef CONFIG_PARTITION_MODE #ifndef CONFIG_PARTITION_MODE
#define MAX_VPCI_DEV_OPS 4U #define MAX_VPCI_DEV_OPS 4U
@ -99,7 +105,7 @@ struct pci_vdev {
struct pci_pdev pdev; struct pci_pdev pdev;
uint8_t cfgdata[PCI_REGMAX + 1U]; union cfgdata cfgdata;
/* The bar info of the virtual PCI device. */ /* The bar info of the virtual PCI device. */
struct pci_bar bar[PCI_BAR_COUNT]; struct pci_bar bar[PCI_BAR_COUNT];