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hv: mmu: add static paging table allocation for hypervisor

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Add static paging table allocation API for hypervisor.
Note: must configure PLATFORM_RAM_SIZE and PLATFORM_MMIO_SIZE exactly as the platform.

Rename RAM_START/RAM_SIZE to HV_RAM_START/HV_RAM_SIZE for HV.

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
This commit is contained in:
Li, Fei1
2018-10-29 23:28:32 +08:00
committed by lijinxia
parent 74a5eec3a7
commit dc9d18a868
12 changed files with 163 additions and 39 deletions
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1
hypervisor/include/arch/x86/hv_arch.h
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@@ -28,6 +28,7 @@
#include <vioapic.h>
#include <vm.h>
#include <cpuid.h>
#include <page.h>
#include <mmu.h>
#include <pgtable.h>
#include <irq.h>

48
hypervisor/include/arch/x86/page.h Normal file
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@@ -0,0 +1,48 @@
/*
* Copyright (C) 2018 Intel Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef PAGE_H
#define PAGE_H
#define PAGE_SHIFT 12U
#define PAGE_SIZE (1UL << PAGE_SHIFT)
/* size of the low MMIO address space: 2GB */
#define PLATFORM_LO_MMIO_SIZE 0x80000000UL
struct page {
uint8_t contents[PAGE_SIZE];
} __aligned(PAGE_SIZE);
union pgtable_pages_info {
struct {
struct page *pml4_base;
struct page *pdpt_base;
struct page *pd_base;
struct page *pt_base;
} ppt;
struct {
struct page *nworld_pml4_base;
struct page *nworld_pdpt_base;
struct page *nworld_pd_base;
struct page *nworld_pt_base;
struct page *sworld_pgtable_base;
} ept;
};
struct memory_ops {
union pgtable_pages_info *info;
uint64_t (*get_default_access_right)(void);
uint64_t (*pgentry_present)(uint64_t pte);
struct page *(*get_pml4_page)(const union pgtable_pages_info *info, uint64_t gpa);
struct page *(*get_pdpt_page)(const union pgtable_pages_info *info, uint64_t gpa);
struct page *(*get_pd_page)(const union pgtable_pages_info *info, uint64_t gpa);
struct page *(*get_pt_page)(const union pgtable_pages_info *info, uint64_t gpa);
};
extern const struct memory_ops ppt_mem_ops;
#endif /* PAGE_H */