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DM: remove unused function virtio_pci_modern_cfgread and virtio_pci_modern_cfgwrite
Change-Id: I3f362858956a642ae0de9ab36387e274fc939659 Tracked-On: #3123 Signed-off-by: Ying Liu <ying2.liu@intel.com> Acked-by: Anthony Xu <anthony.xu@intel.com>
This commit is contained in:
yliu79
ACRN System Integration
parent
62f14bb11f
commit
dcd6d8b5a9
@ -1839,131 +1839,6 @@ virtio_pci_write(struct vmctx *ctx, int vcpu, struct pci_vdev *dev,
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base->vops->name, baridx);
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}
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/**
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* @brief Handle PCI configuration space reads.
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*
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* Handle virtio PCI configuration space reads. Only the specific registers
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* that need speical operation are handled in this callback. For others just
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* fallback to pci core. This interface is only valid for virtio modern.
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*
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* @param ctx Pointer to struct vmctx representing VM context.
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* @param vcpu VCPU ID.
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* @param dev Pointer to struct pci_vdev which emulates a PCI device.
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* @param coff Register offset in bytes within PCI configuration space.
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* @param bytes Access range in bytes.
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* @param rv The value returned as read.
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*
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* @return 0 on handled and non-zero on non-handled.
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*/
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int
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virtio_pci_modern_cfgread(struct vmctx *ctx, int vcpu, struct pci_vdev *dev,
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int coff, int bytes, uint32_t *rv)
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{
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struct virtio_base *base = dev->arg;
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struct virtio_pci_cfg_cap *cfg;
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uint32_t value;
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int cfg_coff = base->cfg_coff;
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size_t cfg_data_offset;
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cfg_data_offset = offsetof(struct virtio_pci_cfg_cap, pci_cfg_data);
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/* we only need to handle the read to
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* virtio_pci_cfg_cap.pci_cfg_data[]
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* fallback for anything else by return -1
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*/
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if ((cfg_coff > 0) && (coff >= cfg_coff + cfg_data_offset) &&
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(coff + bytes <= cfg_coff + sizeof(*cfg))) {
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cfg = (struct virtio_pci_cfg_cap *)&dev->cfgdata[cfg_coff];
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if (cfg->cap.bar == base->modern_pio_bar_idx)
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value = virtio_pci_modern_pio_read(ctx, vcpu, dev,
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cfg->cap.bar, cfg->cap.offset, cfg->cap.length);
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else if (cfg->cap.bar == base->modern_mmio_bar_idx)
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value = virtio_pci_modern_mmio_read(ctx, vcpu, dev,
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cfg->cap.bar, cfg->cap.offset, cfg->cap.length);
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else {
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fprintf(stderr, "%s: cfgread unexpected baridx %d\r\n",
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base->vops->name, cfg->cap.bar);
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value = 0;
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}
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/* update pci_cfg_data */
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if (cfg->cap.length == 1)
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pci_set_cfgdata8(dev, cfg_coff + cfg_data_offset,
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value);
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else if (cfg->cap.length == 2)
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pci_set_cfgdata16(dev, cfg_coff + cfg_data_offset,
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value);
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else
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pci_set_cfgdata32(dev, cfg_coff + cfg_data_offset,
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value);
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*rv = value;
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return 0;
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}
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return -1;
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}
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/**
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* @brief Handle PCI configuration space writes.
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*
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* Handle virtio PCI configuration space writes. Only the specific registers
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* that need speical operation are handled in this callback. For others just
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* fallback to pci core. This interface is only valid for virtio modern.
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*
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* @param ctx Pointer to struct vmctx representing VM context.
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* @param vcpu VCPU ID.
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* @param dev Pointer to struct pci_vdev which emulates a PCI device.
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* @param coff Register offset in bytes within PCI configuration space.
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* @param bytes Access range in bytes.
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* @param val The value to write.
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*
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* @return 0 on handled and non-zero on non-handled.
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*/
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int
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virtio_pci_modern_cfgwrite(struct vmctx *ctx, int vcpu, struct pci_vdev *dev,
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int coff, int bytes, uint32_t val)
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{
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struct virtio_base *base = dev->arg;
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struct virtio_pci_cfg_cap *cfg;
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int cfg_coff = base->cfg_coff;
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size_t cfg_data_offset;
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cfg_data_offset = offsetof(struct virtio_pci_cfg_cap, pci_cfg_data);
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/* we only need to handle the write to
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* virtio_pci_cfg_cap.pci_cfg_data[]
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* fallback for anything else by return -1
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*/
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if ((cfg_coff > 0) && (coff >= cfg_coff + cfg_data_offset) &&
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(coff + bytes <= cfg_coff + sizeof(*cfg))) {
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/* default cfg write */
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if (bytes == 1)
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pci_set_cfgdata8(dev, coff, val);
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else if (bytes == 2)
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pci_set_cfgdata16(dev, coff, val);
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else
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pci_set_cfgdata32(dev, coff, val);
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cfg = (struct virtio_pci_cfg_cap *)&dev->cfgdata[cfg_coff];
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if (cfg->cap.bar == base->modern_pio_bar_idx)
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virtio_pci_modern_pio_write(ctx, vcpu, dev,
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cfg->cap.bar, cfg->cap.offset,
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cfg->cap.length, val);
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else if (cfg->cap.bar == base->modern_mmio_bar_idx)
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virtio_pci_modern_mmio_write(ctx, vcpu, dev,
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cfg->cap.bar, cfg->cap.offset,
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cfg->cap.length, val);
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else
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fprintf(stderr, "%s: cfgwrite unexpected baridx %d\r\n",
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base->vops->name, cfg->cap.bar);
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return 0;
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}
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return -1;
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}
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/**
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* @brief Get the virtio poll parameters
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*
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@ -730,44 +730,6 @@ void virtio_pci_write(struct vmctx *ctx, int vcpu, struct pci_vdev *dev,
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*/
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int virtio_set_modern_bar(struct virtio_base *base, bool use_notify_pio);
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/**
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* @brief Handle PCI configuration space reads.
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*
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* Handle virtio PCI configuration space reads. Only the specific registers
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* that need speical operation are handled in this callback. For others just
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* fallback to pci core. This interface is only valid for virtio modern.
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*
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* @param ctx Pointer to struct vmctx representing VM context.
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* @param vcpu VCPU ID.
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* @param dev Pointer to struct pci_vdev which emulates a PCI device.
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* @param coff Register offset in bytes within PCI configuration space.
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* @param bytes Access range in bytes.
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* @param rv The value returned as read.
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*
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* @return 0 on handled and non-zero on non-handled.
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*/
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int virtio_pci_modern_cfgread(struct vmctx *ctx, int vcpu, struct pci_vdev *dev,
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int coff, int bytes, uint32_t *rv);
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/**
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* @brief Handle PCI configuration space writes.
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*
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* Handle virtio PCI configuration space writes. Only the specific registers
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* that need speical operation are handled in this callback. For others just
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* fallback to pci core. This interface is only valid for virtio modern.
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*
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* @param ctx Pointer to struct vmctx representing VM context.
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* @param vcpu VCPU ID.
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* @param dev Pointer to struct pci_vdev which emulates a PCI device.
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* @param coff Register offset in bytes within PCI configuration space.
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* @param bytes Access range in bytes.
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* @param val The value to write.
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*
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* @return 0 on handled and non-zero on non-handled.
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*/
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int virtio_pci_modern_cfgwrite(struct vmctx *ctx, int vcpu,
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struct pci_vdev *dev, int coff, int bytes,
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uint32_t val);
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/**
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* @}
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*/
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