github/acrn-hypervisor
1
0
Fork 0
mirror of https://github.com/projectacrn/acrn-hypervisor.git synced 2025-08-09 03:58:34 +00:00
Code Issues Projects Releases Wiki Activity

config_tools: refine the configuration data description

Browse Source 
This patch refines the configuration data description so that it is
consistent with the current implementation of the configuration tools.

Tracked-On: #6377

Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
This commit is contained in:
Shiqing Gao 2021-08-11 09:13:59 +08:00 committed by wenlingz
parent 3df703a64e
commit de19301a5a
2 changed files with 17 additions and 8 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

20
misc/config_tools/schema/config.xsd
View File

@ -24,10 +24,17 @@ hypervisor shell.</xs:documentation>
<xs:element name="SERIAL_CONSOLE" type="SerialConsoleOptions" default="/dev/ttyS0">
<xs:annotation>
<xs:documentation>Specify the host serial device used for hypervisor debugging.
This option is only valid if the Service VM :ref:`vm.legacy_vuart` is
enabled. Leave this field empty if the Service VM's :ref:`vm.console_vuart` is enabled. Uses
:option:`vm.os_config.bootargs` for :ref:`vm.console_vuart`
configuration.</xs:documentation>
This entry is valid if and only if `hv.DEBUG_OPTIONS.RELEASE` is n.
This entry impacts the content of `vm.(legacy_vuart id="0").base` when `vm.vm_type` is SOS_VM,
which specifies the PIO base for Service VM legacy vUART 0 (used for console).
The determination of the PIO base for Service VM legacy vUART 0 follows the rules below:
- If hv.DEBUG_OPTIONS.SERIAL_CONSOLE is one of [ttys0, ttys1, ttys2, ttys3] and it's a PIO in the
native environment, the PIO base of Service VM legacy vUART 0 would be the same as the PIO base
corresponding to hv.DEBUG_OPTIONS.SERIAL_CONSOLE in the native environment.
- Otherwise, a PIO base would be assigned to Service VM legacy vUART 0 from the available PIO list.
The above logic is implemented in the configuration tools.</xs:documentation>
</xs:annotation>
</xs:element>
<xs:element name="MEM_LOGLEVEL" type="LogLevelType" default="5">
@ -280,13 +287,12 @@ initialization.</xs:documentation>
</xs:element>
<xs:element name="MAX_PT_IRQ_ENTRIES" type="xs:integer" default="256">
<xs:annotation>
<xs:documentation>Maximum number of interrupt source for PT
devices.</xs:documentation>
<xs:documentation>The pre-defined number of interrupt sources of all pass-through devices.</xs:documentation>
</xs:annotation>
</xs:element>
<xs:element name="MAX_MSIX_TABLE_NUM" default="64">
<xs:annotation>
<xs:documentation>Maximum number of MSI-X tables per device.
<xs:documentation>Pre-defined maximum number of virtual MSI-X Table entries per device.
If this value is empty, then the default value will be calculated from the board XML file.</xs:documentation>
</xs:annotation>
<xs:simpleType>

5
misc/config_tools/schema/types.xsd
View File

@ -178,7 +178,10 @@ value ``n``.</xs:documentation>
<xs:element name="CLOS_MASK" type="xs:string" minOccurs="0" maxOccurs="unbounded">
<xs:annotation>
<xs:documentation>Specify the cache capacity bitmask for the CLOS; only continuous '1' bits
are allowed. The value will be ignored when hardware does not support RDT.</xs:documentation>
are allowed. The value will be ignored when hardware does not support RDT.
This entry takes effect only if `hv.FEATURES.RDT.RDT_ENABLED` is y.
As `vm.clos.vcpu_clos` specifies the index of the CLOS to be associated with the given vCPU,
`hv.FEATURES.RDT.CLOS_MASK` of that CLOS would impact the performance of the given vCPU.</xs:documentation>
</xs:annotation>
</xs:element>
<xs:element name="MBA_DELAY" type="xs:string" minOccurs="0" maxOccurs="unbounded">