mirror of
https://github.com/projectacrn/acrn-hypervisor.git
synced 2025-06-19 20:22:46 +00:00
hv: refine functions name
Make the name of the functions more accurate Tracked-On: #4433 Signed-off-by: Yuan Liu <yuan1.liu@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
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7c82efb938
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@ -99,7 +99,7 @@ static void deinit_vhostbridge(__unused struct pci_vdev *vdev)
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* @pre vdev->vpci != NULL
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* @pre vdev->vpci->vm != NULL
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*/
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static int32_t vhostbridge_read_cfg(const struct pci_vdev *vdev, uint32_t offset,
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static int32_t read_vhostbridge_cfg(const struct pci_vdev *vdev, uint32_t offset,
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uint32_t bytes, uint32_t *val)
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{
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*val = pci_vdev_read_cfg(vdev, offset, bytes);
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@ -112,7 +112,7 @@ static int32_t vhostbridge_read_cfg(const struct pci_vdev *vdev, uint32_t offset
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* @pre vdev->vpci != NULL
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* @pre vdev->vpci->vm != NULL
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*/
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static int32_t vhostbridge_write_cfg(struct pci_vdev *vdev, uint32_t offset,
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static int32_t write_vhostbridge_cfg(struct pci_vdev *vdev, uint32_t offset,
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uint32_t bytes, uint32_t val)
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{
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if (!is_bar_offset(PCI_BAR_COUNT, offset)) {
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@ -124,6 +124,6 @@ static int32_t vhostbridge_write_cfg(struct pci_vdev *vdev, uint32_t offset,
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const struct pci_vdev_ops vhostbridge_ops = {
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.init_vdev = init_vhostbridge,
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.deinit_vdev = deinit_vhostbridge,
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.write_vdev_cfg = vhostbridge_write_cfg,
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.read_vdev_cfg = vhostbridge_read_cfg,
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.write_vdev_cfg = write_vhostbridge_cfg,
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.read_vdev_cfg = read_vhostbridge_cfg,
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};
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@ -39,15 +39,15 @@
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static void vpci_init_vdevs(struct acrn_vm *vm);
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static void deinit_prelaunched_vm_vpci(struct acrn_vm *vm);
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static void deinit_postlaunched_vm_vpci(struct acrn_vm *vm);
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static int32_t read_cfg(struct acrn_vpci *vpci, union pci_bdf bdf, uint32_t offset, uint32_t bytes, uint32_t *val);
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static int32_t write_cfg(struct acrn_vpci *vpci, union pci_bdf bdf, uint32_t offset, uint32_t bytes, uint32_t val);
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static int32_t vpci_read_cfg(struct acrn_vpci *vpci, union pci_bdf bdf, uint32_t offset, uint32_t bytes, uint32_t *val);
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static int32_t vpci_write_cfg(struct acrn_vpci *vpci, union pci_bdf bdf, uint32_t offset, uint32_t bytes, uint32_t val);
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static struct pci_vdev *find_vdev(struct acrn_vpci *vpci, union pci_bdf bdf);
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/**
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* @pre vcpu != NULL
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* @pre vcpu->vm != NULL
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*/
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static bool pci_cfgaddr_io_read(struct acrn_vcpu *vcpu, uint16_t addr, size_t bytes)
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static bool vpci_pio_cfgaddr_read(struct acrn_vcpu *vcpu, uint16_t addr, size_t bytes)
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{
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uint32_t val = ~0U;
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struct acrn_vpci *vpci = &vcpu->vm->vpci;
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@ -70,7 +70,7 @@ static bool pci_cfgaddr_io_read(struct acrn_vcpu *vcpu, uint16_t addr, size_t by
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* @retval true on success.
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* @retval false. (ACRN will deliver this IO request to DM to handle for post-launched VM)
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*/
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static bool pci_cfgaddr_io_write(struct acrn_vcpu *vcpu, uint16_t addr, size_t bytes, uint32_t val)
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static bool vpci_pio_cfgaddr_write(struct acrn_vcpu *vcpu, uint16_t addr, size_t bytes, uint32_t val)
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{
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bool ret = true;
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struct acrn_vpci *vpci = &vcpu->vm->vpci;
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@ -120,7 +120,7 @@ static inline bool vpci_is_valid_access(uint32_t offset, uint32_t bytes)
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* @retval true on success.
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* @retval false. (ACRN will deliver this IO request to DM to handle for post-launched VM)
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*/
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static bool pci_cfgdata_io_read(struct acrn_vcpu *vcpu, uint16_t addr, size_t bytes)
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static bool vpci_pio_cfgdata_read(struct acrn_vcpu *vcpu, uint16_t addr, size_t bytes)
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{
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int32_t ret = 0;
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struct acrn_vm *vm = vcpu->vm;
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@ -135,7 +135,7 @@ static bool pci_cfgdata_io_read(struct acrn_vcpu *vcpu, uint16_t addr, size_t by
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if (cfg_addr.bits.enable != 0U) {
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if (vpci_is_valid_access(cfg_addr.bits.reg_num + offset, bytes)) {
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bdf.value = cfg_addr.bits.bdf;
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ret = read_cfg(vpci, bdf, cfg_addr.bits.reg_num + offset, bytes, &val);
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ret = vpci_read_cfg(vpci, bdf, cfg_addr.bits.reg_num + offset, bytes, &val);
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}
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}
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@ -153,7 +153,7 @@ static bool pci_cfgdata_io_read(struct acrn_vcpu *vcpu, uint16_t addr, size_t by
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* @retval true on success.
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* @retval false. (ACRN will deliver this IO request to DM to handle for post-launched VM)
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*/
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static bool pci_cfgdata_io_write(struct acrn_vcpu *vcpu, uint16_t addr, size_t bytes, uint32_t val)
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static bool vpci_pio_cfgdata_write(struct acrn_vcpu *vcpu, uint16_t addr, size_t bytes, uint32_t val)
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{
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int32_t ret = 0;
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struct acrn_vm *vm = vcpu->vm;
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@ -166,7 +166,7 @@ static bool pci_cfgdata_io_write(struct acrn_vcpu *vcpu, uint16_t addr, size_t b
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if (cfg_addr.bits.enable != 0U) {
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if (vpci_is_valid_access(cfg_addr.bits.reg_num + offset, bytes)) {
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bdf.value = cfg_addr.bits.bdf;
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ret = write_cfg(vpci, bdf, cfg_addr.bits.reg_num + offset, bytes, val);
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ret = vpci_write_cfg(vpci, bdf, cfg_addr.bits.reg_num + offset, bytes, val);
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}
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}
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@ -179,7 +179,7 @@ static bool pci_cfgdata_io_write(struct acrn_vcpu *vcpu, uint16_t addr, size_t b
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* @retval 0 on success.
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* @retval other on false. (ACRN will deliver this MMIO request to DM to handle for post-launched VM)
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*/
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static int32_t vpci_handle_mmconfig_access(struct io_request *io_req, void *private_data)
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static int32_t vpci_mmio_cfg_access(struct io_request *io_req, void *private_data)
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{
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int32_t ret = 0;
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struct mmio_request *mmio = &io_req->reqs.mmio;
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@ -202,14 +202,14 @@ static int32_t vpci_handle_mmconfig_access(struct io_request *io_req, void *priv
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if (mmio->direction == REQUEST_READ) {
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if (!is_plat_hidden_pdev(bdf)) {
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ret = read_cfg(vpci, bdf, reg_num, (uint32_t)mmio->size, (uint32_t *)&mmio->value);
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ret = vpci_read_cfg(vpci, bdf, reg_num, (uint32_t)mmio->size, (uint32_t *)&mmio->value);
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} else {
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/* expose and pass through platform hidden devices to SOS */
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mmio->value = (uint64_t)pci_pdev_read_cfg(bdf, reg_num, (uint32_t)mmio->size);
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}
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} else {
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if (!is_plat_hidden_pdev(bdf)) {
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ret = write_cfg(vpci, bdf, reg_num, (uint32_t)mmio->size, (uint32_t)mmio->value);
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ret = vpci_write_cfg(vpci, bdf, reg_num, (uint32_t)mmio->size, (uint32_t)mmio->value);
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} else {
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/* expose and pass through platform hidden devices to SOS */
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pci_pdev_write_cfg(bdf, reg_num, (uint32_t)mmio->size, (uint32_t)mmio->value);
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@ -248,17 +248,17 @@ void vpci_init(struct acrn_vm *vm)
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/* PCI MMCONFIG for post-launched VM is fixed to 0xE0000000 */
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pci_mmcfg_base = (vm_config->load_order == SOS_VM) ? get_mmcfg_base() : 0xE0000000UL;
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vm->vpci.pci_mmcfg_base = pci_mmcfg_base;
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register_mmio_emulation_handler(vm, vpci_handle_mmconfig_access,
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register_mmio_emulation_handler(vm, vpci_mmio_cfg_access,
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pci_mmcfg_base, pci_mmcfg_base + PCI_MMCONFIG_SIZE, &vm->vpci, false);
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}
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/* Intercept and handle I/O ports CF8h */
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register_pio_emulation_handler(vm, PCI_CFGADDR_PIO_IDX, &pci_cfgaddr_range,
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pci_cfgaddr_io_read, pci_cfgaddr_io_write);
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vpci_pio_cfgaddr_read, vpci_pio_cfgaddr_write);
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/* Intercept and handle I/O ports CFCh -- CFFh */
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register_pio_emulation_handler(vm, PCI_CFGDATA_PIO_IDX, &pci_cfgdata_range,
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pci_cfgdata_io_read, pci_cfgdata_io_write);
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vpci_pio_cfgdata_read, vpci_pio_cfgdata_write);
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spinlock_init(&vm->vpci.lock);
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}
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@ -370,7 +370,7 @@ static void vpci_deinit_pt_dev(struct pci_vdev *vdev)
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deinit_vmsi(vdev);
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}
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static int32_t vpci_write_pt_dev_cfg(struct pci_vdev *vdev, uint32_t offset,
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static int32_t write_pt_dev_cfg(struct pci_vdev *vdev, uint32_t offset,
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uint32_t bytes, uint32_t val)
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{
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if (vbar_access(vdev, offset)) {
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@ -399,7 +399,7 @@ static int32_t vpci_write_pt_dev_cfg(struct pci_vdev *vdev, uint32_t offset,
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return 0;
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}
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static int32_t vpci_read_pt_dev_cfg(const struct pci_vdev *vdev, uint32_t offset,
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static int32_t read_pt_dev_cfg(const struct pci_vdev *vdev, uint32_t offset,
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uint32_t bytes, uint32_t *val)
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{
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if (vbar_access(vdev, offset)) {
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@ -431,14 +431,14 @@ static int32_t vpci_read_pt_dev_cfg(const struct pci_vdev *vdev, uint32_t offset
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static const struct pci_vdev_ops pci_pt_dev_ops = {
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.init_vdev = vpci_init_pt_dev,
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.deinit_vdev = vpci_deinit_pt_dev,
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.write_vdev_cfg = vpci_write_pt_dev_cfg,
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.read_vdev_cfg = vpci_read_pt_dev_cfg,
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.write_vdev_cfg = write_pt_dev_cfg,
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.read_vdev_cfg = read_pt_dev_cfg,
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};
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/**
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* @pre vpci != NULL
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*/
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static int32_t read_cfg(struct acrn_vpci *vpci, union pci_bdf bdf,
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static int32_t vpci_read_cfg(struct acrn_vpci *vpci, union pci_bdf bdf,
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uint32_t offset, uint32_t bytes, uint32_t *val)
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{
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int32_t ret = 0;
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@ -460,7 +460,7 @@ static int32_t read_cfg(struct acrn_vpci *vpci, union pci_bdf bdf,
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/**
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* @pre vpci != NULL
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*/
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static int32_t write_cfg(struct acrn_vpci *vpci, union pci_bdf bdf,
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static int32_t vpci_write_cfg(struct acrn_vpci *vpci, union pci_bdf bdf,
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uint32_t offset, uint32_t bytes, uint32_t val)
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{
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int32_t ret = 0;
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@ -93,7 +93,7 @@ static void deinit_vpci_bridge(__unused struct pci_vdev *vdev)
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{
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}
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static int32_t vpci_bridge_read_cfg(const struct pci_vdev *vdev, uint32_t offset,
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static int32_t read_vpci_bridge_cfg(const struct pci_vdev *vdev, uint32_t offset,
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uint32_t bytes, uint32_t *val)
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{
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if ((offset + bytes) <= 0x100U) {
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@ -106,7 +106,7 @@ static int32_t vpci_bridge_read_cfg(const struct pci_vdev *vdev, uint32_t offset
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return 0;
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}
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static int32_t vpci_bridge_write_cfg(__unused struct pci_vdev *vdev, __unused uint32_t offset,
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static int32_t write_vpci_bridge_cfg(__unused struct pci_vdev *vdev, __unused uint32_t offset,
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__unused uint32_t bytes, __unused uint32_t val)
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{
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return 0;
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@ -115,6 +115,6 @@ static int32_t vpci_bridge_write_cfg(__unused struct pci_vdev *vdev, __unused ui
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const struct pci_vdev_ops vpci_bridge_ops = {
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.init_vdev = init_vpci_bridge,
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.deinit_vdev = deinit_vpci_bridge,
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.write_vdev_cfg = vpci_bridge_write_cfg,
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.read_vdev_cfg = vpci_bridge_read_cfg,
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.write_vdev_cfg = write_vpci_bridge_cfg,
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.read_vdev_cfg = read_vpci_bridge_cfg,
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};
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